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2023 Vol. 45, No. 9
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2023, 45(9): 3057-3068.
doi: 10.11999/JEIT230323
Abstract:
The higher level of integration and smaller feature size in advanced technology nodes have led to increased electrical field and current density, which worsen further the chip aging issues. Current design solutions against aging are still based on gu...
The higher level of integration and smaller feature size in advanced technology nodes have led to increased electrical field and current density, which worsen further the chip aging issues. Current design solutions against aging are still based on gu...
2023, 45(9): 3069-3082.
doi: 10.11999/JEIT230266
Abstract:
Driven by Moore’s law, the aggressive shrinking of feature sizes, and the complexity of the chip design is also steadily increasing. Electronic Design Automation (EDA) technology faces challenges from many aspects such as runtime and computing resour...
Driven by Moore’s law, the aggressive shrinking of feature sizes, and the complexity of the chip design is also steadily increasing. Electronic Design Automation (EDA) technology faces challenges from many aspects such as runtime and computing resour...
2023, 45(9): 3083-3097.
doi: 10.11999/JEIT230370
Abstract:
Recently, with the development of the Internet of Things and Artificial Intelligence, higher energy efficiency, density, and performance in on-chip memories and intelligent computing are required. Facing the energy efficiency and density bottleneck i...
Recently, with the development of the Internet of Things and Artificial Intelligence, higher energy efficiency, density, and performance in on-chip memories and intelligent computing are required. Facing the energy efficiency and density bottleneck i...
2023, 45(9): 3098-3108.
doi: 10.11999/JEIT230352
Abstract:
Deep learning has emerged as one of the most important algorithms in artificial intelligence. With the increasing application scenarios, the hardware scales for deep learning are becoming larger, and the computational complexity has considerably incr...
Deep learning has emerged as one of the most important algorithms in artificial intelligence. With the increasing application scenarios, the hardware scales for deep learning are becoming larger, and the computational complexity has considerably incr...
2023, 45(9): 3109-3117.
doi: 10.11999/JEIT230295
Abstract:
The side-channel power analysis attack technique, with its advantages of low computational complexity and high generality, poses a critical security challenge to all kinds of cryptographic implementations. The assessment of resistance to power analys...
The side-channel power analysis attack technique, with its advantages of low computational complexity and high generality, poses a critical security challenge to all kinds of cryptographic implementations. The assessment of resistance to power analys...
2023, 45(9): 3118-3131.
doi: 10.11999/JEIT230387
Abstract:
An Open-source Placement And Routing Framework (OpenPARF) for large-scale FPGA physical design is proposed in this paper. OpenPARF is implemented with of deep learning toolkit PyTorch and supports GPU massive parallel acceleration. For placement, the...
An Open-source Placement And Routing Framework (OpenPARF) for large-scale FPGA physical design is proposed in this paper. OpenPARF is implemented with of deep learning toolkit PyTorch and supports GPU massive parallel acceleration. For placement, the...
2023, 45(9): 3132-3140.
doi: 10.11999/JEIT230325
Abstract:
The rapidly developing neural network has achieved great success in fields such as target detection. Currently, an important research direction is to deploy efficiently and automatically network models on various edge devices through a neural network...
The rapidly developing neural network has achieved great success in fields such as target detection. Currently, an important research direction is to deploy efficiently and automatically network models on various edge devices through a neural network...
2023, 45(9): 3141-3149.
doi: 10.11999/JEIT230480
Abstract:
In order to avoid the threat of instruction defects to the processor, this paper proposes a RISC-V test sequence generation method based on instruction generation constraints. A test instruction sequence generation framework is constructed based on t...
In order to avoid the threat of instruction defects to the processor, this paper proposes a RISC-V test sequence generation method based on instruction generation constraints. A test instruction sequence generation framework is constructed based on t...
2023, 45(9): 3150-3156.
doi: 10.11999/JEIT230382
Abstract:
In the post-Moore era, 3D Chiplet clusters are typically integrated heterogeneously using Through Silicon Vias (TSVs), whose complex flow increases the difficulty and cost of chip manufacturing. Based on the upside-down packaging of BackSide-Illumina...
In the post-Moore era, 3D Chiplet clusters are typically integrated heterogeneously using Through Silicon Vias (TSVs), whose complex flow increases the difficulty and cost of chip manufacturing. Based on the upside-down packaging of BackSide-Illumina...
2023, 45(9): 3157-3165.
doi: 10.11999/JEIT230287
Abstract:
The research on polymorphic circuits applied to the field of hardware security for new devices other than Metal Oxide Semiconductor Field-Effect Transistors (MOSFET) is relatively limited, often with only a few design examples, lacking general resear...
The research on polymorphic circuits applied to the field of hardware security for new devices other than Metal Oxide Semiconductor Field-Effect Transistors (MOSFET) is relatively limited, often with only a few design examples, lacking general resear...
2023, 45(9): 3166-3174.
doi: 10.11999/JEIT230359
Abstract:
Power consumption is identified as a critical performance objective in circuit design.Existing power estimation tools, such as PrimeTime PX (PTPX), provide high accuracy but are hampered by lengthy execution times and are confined to logic synthesis ...
Power consumption is identified as a critical performance objective in circuit design.Existing power estimation tools, such as PrimeTime PX (PTPX), provide high accuracy but are hampered by lengthy execution times and are confined to logic synthesis ...
2023, 45(9): 3175-3183.
doi: 10.11999/JEIT221142
Abstract:
Modular System-on-Chips (MSoC) contain several distinct IP components with possibly multiple sub-networks, resulting in potential deadlock situations for the Network on Chip (NoC). A MSoC is developed, and three deadlock cases in Advanced eXtensible ...
Modular System-on-Chips (MSoC) contain several distinct IP components with possibly multiple sub-networks, resulting in potential deadlock situations for the Network on Chip (NoC). A MSoC is developed, and three deadlock cases in Advanced eXtensible ...
2023, 45(9): 3184-3192.
doi: 10.11999/JEIT230365
Abstract:
Tunneling Magnetic Resistance (TMR) sensors have lower power consumption, higher sensitivity, and better reliability than other types of magnetoresistive sensors and have broad application prospects in military and civilian fields. A design scheme fo...
Tunneling Magnetic Resistance (TMR) sensors have lower power consumption, higher sensitivity, and better reliability than other types of magnetoresistive sensors and have broad application prospects in military and civilian fields. A design scheme fo...
2023, 45(9): 3193-3199.
doi: 10.11999/JEIT230371
Abstract:
Graph computing has been widely applied to emerging fields such as social network analysis and recommendation systems. However, large-scale graph computing under the traditional Von-Neumann architecture faces the memory access bottleneck. The newly d...
Graph computing has been widely applied to emerging fields such as social network analysis and recommendation systems. However, large-scale graph computing under the traditional Von-Neumann architecture faces the memory access bottleneck. The newly d...
Detecting and Mapping Framework for Physical Devices Based on Rowhammer Physical Unclonable Function
2023, 45(9): 3200-3209.
doi: 10.11999/JEIT230388
Abstract:
The core problem of cyberspace mapping is to identify accurately and track dynamically devices. However, with the development of anonymization technology, devices can have multiple IP addresses and MAC addresses. This makes it increasingly difficult ...
The core problem of cyberspace mapping is to identify accurately and track dynamically devices. However, with the development of anonymization technology, devices can have multiple IP addresses and MAC addresses. This makes it increasingly difficult ...
2023, 45(9): 3210-3217.
doi: 10.11999/JEIT230267
Abstract:
To address the security threat of quantum commutating on classic public key cryptography. Post-Quantum Cryptography (PQC) has gradually become a new generation cryptography technology. Although PQC ensures the security strength of the algorithms thro...
To address the security threat of quantum commutating on classic public key cryptography. Post-Quantum Cryptography (PQC) has gradually become a new generation cryptography technology. Although PQC ensures the security strength of the algorithms thro...
2023, 45(9): 3218-3227.
doi: 10.11999/JEIT230300
Abstract:
Spiking Neural Networks (SNNs) in neuromorphic chips have the advantages of high sparsity and low power consumption, which make them suitable for visual classification tasks. However, they are still vulnerable to adversarial attacks. Existing studies...
Spiking Neural Networks (SNNs) in neuromorphic chips have the advantages of high sparsity and low power consumption, which make them suitable for visual classification tasks. However, they are still vulnerable to adversarial attacks. Existing studies...
2023, 45(9): 3228-3233.
doi: 10.11999/JEIT230306
Abstract:
With the feature size of complementary metal oxide semiconductor technology decreasing, the problem of static power consumption becomes more and more serious. Spin Magnetic Random Access Memory (MRAM) has been widely studied because of its nonvolatil...
With the feature size of complementary metal oxide semiconductor technology decreasing, the problem of static power consumption becomes more and more serious. Spin Magnetic Random Access Memory (MRAM) has been widely studied because of its nonvolatil...
2023, 45(9): 3234-3243.
doi: 10.11999/JEIT230378
Abstract:
In order to meet the application requirements of high reliability on-orbit real-time ship target detection, a fault-tolerant reinforcement design for ship target detection based on neural network in Synthetic Aperture Radar (SAR) is proposed. The tin...
In order to meet the application requirements of high reliability on-orbit real-time ship target detection, a fault-tolerant reinforcement design for ship target detection based on neural network in Synthetic Aperture Radar (SAR) is proposed. The tin...
2023, 45(9): 3244-3252.
doi: 10.11999/JEIT230211
Abstract:
Differential Power Analysis (DPA) is a serious threat to cryptographic hardware and software. The RISC-V processor core based on Wave Dynamic Differential Logic (WDDL) is implemented to mitigate the power leakage. However, the WDDL technique results ...
Differential Power Analysis (DPA) is a serious threat to cryptographic hardware and software. The RISC-V processor core based on Wave Dynamic Differential Logic (WDDL) is implemented to mitigate the power leakage. However, the WDDL technique results ...
2023, 45(9): 3253-3262.
doi: 10.11999/JEIT221201
Abstract:
The globalization of the Integrated Circuit(IC) supply chain has shifted most design, manufacturing, and testing processes from a single trusted entity to a variety of untrusted third-party entities in various parts of the world. The use of untrusted...
The globalization of the Integrated Circuit(IC) supply chain has shifted most design, manufacturing, and testing processes from a single trusted entity to a variety of untrusted third-party entities in various parts of the world. The use of untrusted...
2023, 45(9): 3263-3271.
doi: 10.11999/JEIT220975
Abstract:
With the development trend of miniaturization, high density and high speed of electronic equipment, integrated circuit, as the basic core unit of electronic equipment, is also developing in this direction, which brings more and more serious problems ...
With the development trend of miniaturization, high density and high speed of electronic equipment, integrated circuit, as the basic core unit of electronic equipment, is also developing in this direction, which brings more and more serious problems ...
2023, 45(9): 3272-3283.
doi: 10.11999/JEIT230114
Abstract:
With the continuous development of nanoscale CMOS integrated circuits, latches are extremely susceptible to harsh radiation environment, and the multiple-node upset caused by radiation is becoming more and more serious. A Triple Node Upset (TNU) tole...
With the continuous development of nanoscale CMOS integrated circuits, latches are extremely susceptible to harsh radiation environment, and the multiple-node upset caused by radiation is becoming more and more serious. A Triple Node Upset (TNU) tole...
2023, 45(9): 3284-3294.
doi: 10.11999/JEIT221503
Abstract:
In order to improve the super-resolution reconstruction effect of the high-definition color image, a new adaptive image interpolation algorithm based on edge contrast is proposed, which chooses adaptively the coefficients of Lanczos interpolation by ...
In order to improve the super-resolution reconstruction effect of the high-definition color image, a new adaptive image interpolation algorithm based on edge contrast is proposed, which chooses adaptively the coefficients of Lanczos interpolation by ...
2023, 45(9): 3295-3301.
doi: 10.11999/JEIT230304
Abstract:
True Random Number Generator (TRNG) is a key building block in security applications that provides the required high-quality random bits for data encryption, cryptographic random numbers, and initialization vectors. The Ring Oscillator (RO) TRNG is a...
True Random Number Generator (TRNG) is a key building block in security applications that provides the required high-quality random bits for data encryption, cryptographic random numbers, and initialization vectors. The Ring Oscillator (RO) TRNG is a...
2023, 45(9): 3302-3310.
doi: 10.11999/JEIT230349
Abstract:
Fully Homomorphic Encryption (FHE) attracts emerging interests from the fields of medical diagnosis, cloud computing, machine learning, etc. because it can realize the calculation on encrypted data and improve significantly the security of private da...
Fully Homomorphic Encryption (FHE) attracts emerging interests from the fields of medical diagnosis, cloud computing, machine learning, etc. because it can realize the calculation on encrypted data and improve significantly the security of private da...
2023, 45(9): 3311-3320.
doi: 10.11999/JEIT221059
Abstract:
The traditional power electronic converter design adopts mostly the sequential design method, which relies on manual experience. In recent years, power electronics automation design has attracted much attention by optimizing rapidly the design of pow...
The traditional power electronic converter design adopts mostly the sequential design method, which relies on manual experience. In recent years, power electronics automation design has attracted much attention by optimizing rapidly the design of pow...
2023, 45(9): 3321-3330.
doi: 10.11999/JEIT221168
Abstract:
Continuous-flow microfluidic biochips need usually to construct complex and interlaced flow paths to support the transportation of sample/reagent, and also require a large number of flow ports to promote the orderly fluids flow, thereby hinders the f...
Continuous-flow microfluidic biochips need usually to construct complex and interlaced flow paths to support the transportation of sample/reagent, and also require a large number of flow ports to promote the orderly fluids flow, thereby hinders the f...
2023, 45(9): 3331-3339.
doi: 10.11999/JEIT221086
Abstract:
Physical Unclonable Functions(PUF) are widely used in various fields as hardware security primitives. Considering the problems of vulnerability to modeling attacks and low stability of traditional CMOS-based PUF, a memristive Glitch-PUF circuit is pr...
Physical Unclonable Functions(PUF) are widely used in various fields as hardware security primitives. Considering the problems of vulnerability to modeling attacks and low stability of traditional CMOS-based PUF, a memristive Glitch-PUF circuit is pr...
2023, 45(9): 3340-3349.
doi: 10.11999/JEIT221146
Abstract:
To solve the problem that embedding the traditional complex MUlti SIgnal Classification (MUSIC) algorithm directly into the Field Programmable Gate Array (FPGA) will consume a lot of hardware resources and computing time, a FPGA implementation scheme...
To solve the problem that embedding the traditional complex MUlti SIgnal Classification (MUSIC) algorithm directly into the Field Programmable Gate Array (FPGA) will consume a lot of hardware resources and computing time, a FPGA implementation scheme...
2023, 45(9): 3350-3358.
doi: 10.11999/JEIT221257
Abstract:
Based on Computing In Memory (CIM), the analog implementation of activation functions allows the neural networks to become closer to the nonlinear model. However, for CIM, the negative value of Tanh function is difficult to process; A high-speed and ...
Based on Computing In Memory (CIM), the analog implementation of activation functions allows the neural networks to become closer to the nonlinear model. However, for CIM, the negative value of Tanh function is difficult to process; A high-speed and ...
2023, 45(9): 3359-3369.
doi: 10.11999/JEIT221493
Abstract:
There is heterogeneity between different neurons, characteristics of dynamics are also quite different, so the coupling between heterogeneous neurons is a valuable research direction. In this paper, a locally active memristor coupled heterogeneity ne...
There is heterogeneity between different neurons, characteristics of dynamics are also quite different, so the coupling between heterogeneous neurons is a valuable research direction. In this paper, a locally active memristor coupled heterogeneity ne...
2023, 45(9): 3370-3379.
doi: 10.11999/JEIT230021
Abstract:
Recently, the majority of fine-grained sequence-coding algorithms are not applied to the existing Coarse-Grained ReConfigurable Arrays (CGRCA). Moreover, competition conflicts often occur in the encoding stages, which causes low resource utilization ...
Recently, the majority of fine-grained sequence-coding algorithms are not applied to the existing Coarse-Grained ReConfigurable Arrays (CGRCA). Moreover, competition conflicts often occur in the encoding stages, which causes low resource utilization ...
2023, 45(9): 3380-3392.
doi: 10.11999/JEIT230284
Abstract:
Focusing on the current situation that polynomial multiplication parameters in lattice-based cryptography algorithms with different difficult problems and the implementation architecture are not uniform, a reconfigurable architecture based on Preproc...
Focusing on the current situation that polynomial multiplication parameters in lattice-based cryptography algorithms with different difficult problems and the implementation architecture are not uniform, a reconfigurable architecture based on Preproc...
2023, 45(9): 3393-3400.
doi: 10.11999/JEIT230852
Abstract:
In order to reduce the test cost and improve the test quality in ICs. A wafer-level adaptive test method with low test escapes is proposed. The method reduces the test cost of wafers to be tested by filtering the test set based on the effectiveness o...
In order to reduce the test cost and improve the test quality in ICs. A wafer-level adaptive test method with low test escapes is proposed. The method reduces the test cost of wafers to be tested by filtering the test set based on the effectiveness o...
2023, 45(9): 3401-3409.
doi: 10.11999/JEIT221155
Abstract:
In order to improve the quality and efficiency of flow-layer physical co-design in Continuous-Flow Microfluidic Biochips (CFMBs), placement and routing co-design is implemented in three stages. (1) Placement preprocessing stage: Through the logic pla...
In order to improve the quality and efficiency of flow-layer physical co-design in Continuous-Flow Microfluidic Biochips (CFMBs), placement and routing co-design is implemented in three stages. (1) Placement preprocessing stage: Through the logic pla...
2023, 45(9): 3410-3419.
doi: 10.11999/JEIT221420
Abstract:
Due to the common speed bottleneck problem of traditional Single-Slope Analog-to-Digital Converter (SS ADC) and serial two-step ADC, the application requirements of high frame rate CMOS Image Sensor (CIS) in the industry have not been met. In this pa...
Due to the common speed bottleneck problem of traditional Single-Slope Analog-to-Digital Converter (SS ADC) and serial two-step ADC, the application requirements of high frame rate CMOS Image Sensor (CIS) in the industry have not been met. In this pa...
2023, 45(9): 3420-3429.
doi: 10.11999/JEIT221032
Abstract:
As the largest module and one of the most important modules in the System on Chip (SoC), the stability and reliability of memory are related to whether the whole chip can work normally. In order to improve the test efficiency of memory, a novel Dynam...
As the largest module and one of the most important modules in the System on Chip (SoC), the stability and reliability of memory are related to whether the whole chip can work normally. In order to improve the test efficiency of memory, a novel Dynam...
2023, 45(9): 3430-3438.
doi: 10.11999/JEIT221158
Abstract:
Time-Division Multiplexing (TDM) technology is widely applied to solving the IO limitation problem to improve the routability of FPGA system. However, the increase of the TDM ratio leads to a significant increase in system delay. Therefore, a Multi-S...
Time-Division Multiplexing (TDM) technology is widely applied to solving the IO limitation problem to improve the routability of FPGA system. However, the increase of the TDM ratio leads to a significant increase in system delay. Therefore, a Multi-S...
