Hardware Trojan Detection for Gate-level Netlists Based on Graph Neural Network

SHI Jiangyi; WEN Cong; LIU Hongjin; WANG Zekun; ZHANG Shaolin; MA Peijun; LI Kang

doi:10.11999/JEIT221201

Volume 45 Issue 9

Sep. 2023

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Article Navigation > Journal of Electronics & Information Technology > 2023 > 45(9): 3253-3262

SHI Jiangyi, WEN Cong, LIU Hongjin, WANG Zekun, ZHANG Shaolin, MA Peijun, LI Kang. Hardware Trojan Detection for Gate-level Netlists Based on Graph Neural Network[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3253-3262. doi: 10.11999/JEIT221201

Citation:

SHI Jiangyi, WEN Cong, LIU Hongjin, WANG Zekun, ZHANG Shaolin, MA Peijun, LI Kang. Hardware Trojan Detection for Gate-level Netlists Based on Graph Neural Network[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3253-3262. doi: 10.11999/JEIT221201

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Hardware Trojan Detection for Gate-level Netlists Based on Graph Neural Network

doi: 10.11999/JEIT221201

1.
Xidian University, Xi’an 710000, China
2.
Sunwisespace, Beijing 100190, China

Funds: The National Ministry Program (2019-XXXX-ZD-101-00)

Received Date: 2022-09-15
Rev Recd Date: 2022-12-26

Available Online: 2022-12-28

Publish Date: 2023-09-27

Abstract

Abstract

The globalization of the Integrated Circuit(IC) supply chain has shifted most design, manufacturing, and testing processes from a single trusted entity to a variety of untrusted third-party entities in various parts of the world. The use of untrusted Third-Party Intellectual Property(3PIP) can expose a design to significant risk of having Hardware Trojans(HTs) implanted by adversaries. These hardware trojans may cause degradation of the original design, information leakage, or even irreversible damage at the physical level, seriously jeopardizing consumer privacy, security, and company reputation. Various hardware trojan detection approaches proposed in the existing literature have the following drawbacks: the reliance on golden reference model, the requirement for test vector coverage and even the need for manual code review. At the same time, with the increase of the scale of integrated circuits, the hardware trojans with low trigger rate are more difficult to be detected. Therefore, to address the above problems, a graph neural network-based HT detection method is proposed that enables the detection of gate-level hardware trojans without the need for golden reference model as well as logic tests. Graph Sample and AGgrEgate(GraphSAGE) is used to learn the high-dimensional graph features in the gate-level netlist and the attributed node features. Then supervised learning is employed for the training of the detection model. The detection capability of models with different aggregation methods and data balancing methods are explored. An average recall of 92.9% and an average F1 score of 86.2% under the evaluation of the Synopsys 90 nm generic library(SAED) based benchmark in Trust-Hub are achieved by the model, which is an 8.4% improvement in F1 score compared to state of the art. When applied to the dataset with larger data volume based on 250 nm generic library(LEDA), the average recall and F1 of combined logic type are 83.6% and 70.8% respectively, and the average recall and F1 score of timing logic type are 95.0% and 92.8% respectively.
- Hardware Trojan(HT) detection,
- Deep learning,
- Gate-level netlist,
- Graph Neural Network(GNN)

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References(22)

References

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