2025,
47(1):
1-21.
doi: 10.11999/JEIT240012
Abstract:
Objective: The field of cellular mobile communication is advancing toward post-5G (5.5G, Beyond 5G, 5G Advanced) and 6th Generation (6G) standards. This evolution involves a shift from traditional sub-6 GHz operating frequency bands to higher frequency ranges, including millimeter wave (mmWave), terahertz (THz), and even visible light frequencies, which intersect with radar operating bands. Technologies such as Orthogonal Frequency Division Multiplexing (OFDM) and Multiple Input Multiple Output (MIMO) have gained widespread application in both wireless communication and radar domains. Given the shared characteristics and commonalities in signal processing and operating frequency bands between these two fields, “Integrated Sensing And Communication (ISAC)” has emerged as a significant research focus in wireless technologies like 5G Advanced (5G-A), 6G, Wireless Fidelity (WiFi), and radar. This development points toward a network perception paradigm that combines communication, sensing, and computing. The “ISAC” concept aims to unify wireless communication systems (including cellular and WiFi) with wireless sensing technologies (such as radar) and even network Artificial Intelligence (AI) computing capabilities into a cohesive framework. By integrating these elements, the physical layer can share frequencies and Radio Frequency (RF) hardware resources, leading to several advantages: spectrum conservation, cost reduction, minimized hardware size and weight, and enhanced communication perception. In this article, the focus of communication perception integration is primarily on radar communication. ISAC necessitates that both communication and sensing utilize the same radio frequency band and hardware resources. The diverse characteristics of multiple frequency bands, along with the varying hardware requirements for communication and sensing, present increased challenges for ISAC hardware design. Effective hardware design for ISAC systems demands a well-considered architecture and device design for RF transceivers. Key considerations include the receiver’s continuous signal sensing, link budget, and noise figure, all of which are sensitive to factors such as system size, weight, power consumption, and cost. A comprehensive review of relevant literature reveals that while studies on overall architecture, waveform design, signal processing, and THz technology exist within the ISAC domain, they often center on theoretical models and software simulation. Hardware design and technical verification methodologies are sporadically addressed across different studies. Although some literature details specific hardware designs and validation approaches, these are limited in number compared to the rich body of theoretical and algorithmic research, indicating a need for more comprehensive and systematic reviews focused specifically on ISAC hardware design. Methods: This paper summarizes the hardware designs, verification technologies, and systemic hardware verification platforms pertinent to beyond 5G, 6G, and WiFi ISAC systems. Additionally, recent researches on related hardware designs and verification both domestically and internationally are reviewed. The analysis addresses the challenges in hardware design, including the conflicting requirements between communication and sensing systems, In Band Full Duplex (IBFD) Self-Interference Cancellation (SIC), Power Amplifier (PA) efficiency, and the need for more accurate circuit performance modeling. Results and Discussions: Initially, the design of ISAC transceiver architectures from existing research is summarized and compared. Subsequently, an overview and analysis of current ISAC IBFD self-interference suppression strategies, low Peak to Average Power Ratio (PAPR) waveforms, high-performance PA designs, precise device modeling techniques, and systemic hardware verification platforms are presented. Finally, the paper provides a summary of the findings. Future challenges in ISAC hardware design are discussed, including the effects of hardware defects on sensing accuracy, ultra-large scale MIMO systems, high-frequency IBFD, and ISAC hardware designs for Unmanned Aerial Vehicle (UAV) applications. The performance metrics of ISAC IBFD architectures are compared, while the various ISAC transceiver architectures are outlined. Representative hardware verification platforms for ISAC systems are presented. The different ISAC transceiver architectures summarized in this paper are illustrated. Conclusions: In recent years, preliminary research has been conducted on integrated air interface architecture, transceiver hardware design, systematic hardware verification, and demonstration of sensing technologies such as 5G-A, 6G, and WiFi, both domestically and internationally. However, certain limitations persist. Beyond 5G networks, post-5G and 6G ISAC hardware verification platforms primarily operate at the link level rather than at the network system level. This focus on ISAC without the integration of computing functions leads to increased volume and power consumption costs and a reliance on commercial instruments and SDR platforms. Furthermore, the IBFD self-interference suppression technology has yet to fully satisfy the demands of future ultra-large-scale MIMO systems, necessitating further integration with large-scale artificial intelligence model technologies. In light of impending technological challenges and issues of openness, it is crucial for academia and industry to collaborate in addressing these challenges and researching viable solutions. To expedite testing optimization and industrial implementation, practical hardware design transition solutions are required that balance advancements in high-frequency support, receiver architecture, and networking architecture, facilitating the efficient realization of the “ideal” of ISAC.