Research on Low-overhead Dual-output XOR Gate True Random Number Generator Utilizing Fine-grained Sampling

YAO Liang; HUANG Zhengfeng; LIANG Huaguo; LU Yingchun

doi:10.11999/JEIT230304

Volume 45 Issue 9

Sep. 2023

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Article Navigation > Journal of Electronics & Information Technology > 2023 > 45(9): 3295-3301

YAO Liang, HUANG Zhengfeng, LIANG Huaguo, LU Yingchun. Research on Low-overhead Dual-output XOR Gate True Random Number Generator Utilizing Fine-grained Sampling[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3295-3301. doi: 10.11999/JEIT230304

Citation:

YAO Liang, HUANG Zhengfeng, LIANG Huaguo, LU Yingchun. Research on Low-overhead Dual-output XOR Gate True Random Number Generator Utilizing Fine-grained Sampling[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3295-3301. doi: 10.11999/JEIT230304

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Research on Low-overhead Dual-output XOR Gate True Random Number Generator Utilizing Fine-grained Sampling

doi: 10.11999/JEIT230304

1.
School of Integrated Circuits, Anhui University, Hefei 230000, China
2.
School of Microelectronics, Hefei University of Technology, Hefei 230009, China

Funds: The General Program of National Natural Science Foundation of China (62174048, 62274052), The Research and Development Project of Major Scientific Research Instruments of the National Natural Science Foundation of China (62027815), The National Natural Science Foundation of China Key Cooperation Project (61834006), The Special Fund for Basic Research Business Funds of Central Universities (JZ2022HGQA0233)

Received Date: 2023-04-19
Rev Recd Date: 2023-08-16

Available Online: 2023-08-21

Publish Date: 2023-09-27

Abstract

Abstract

True Random Number Generator (TRNG) is a key building block in security applications that provides the required high-quality random bits for data encryption, cryptographic random numbers, and initialization vectors. The Ring Oscillator (RO) TRNG is a broad application design to support a variety of safety-related applications. However, implementing RO TRNG in FPGAs incurs typically high hardware overhead. Therefore, a low-overhead RO TRNG based on a dual-output XOR gate unit is proposed in this paper, and the entropy source circuit of TRNG can be constructed using only a single configurable logic block. Through the multi-phase fine-grained sampling mechanism, circuit jitter is effectively collected and captured. The proposed RO TRNG is implemented and verified on AMD Xilinx Viretx-6 and Artix-7 series FPGAs, and the experimental results show that the proposed RO TRNG hardware overhead is low and the quality of the random sequence is satisfactory.
- True Random Number Generator(TRNG),
- Fine-grained sampling,
- Low overhead

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References(21)

References

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