The Power Suppression Techniques for the DPA-resistant RISC-V CPU Core Based on WDDL

CUI Xiaole; LI Xiuyuan; LI Hao; ZHANG Xing

doi:10.11999/JEIT230211

Volume 45 Issue 9

Sep. 2023

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Article Navigation > Journal of Electronics & Information Technology > 2023 > 45(9): 3244-3252

CUI Xiaole, LI Xiuyuan, LI Hao, ZHANG Xing. The Power Suppression Techniques for the DPA-resistant RISC-V CPU Core Based on WDDL[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3244-3252. doi: 10.11999/JEIT230211

Citation:

CUI Xiaole, LI Xiuyuan, LI Hao, ZHANG Xing. The Power Suppression Techniques for the DPA-resistant RISC-V CPU Core Based on WDDL[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3244-3252. doi: 10.11999/JEIT230211

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The Power Suppression Techniques for the DPA-resistant RISC-V CPU Core Based on WDDL

doi: 10.11999/JEIT230211

CUI Xiaole^{1, 2},
LI Xiuyuan¹,
LI Hao^{1, 2},
ZHANG Xing^{1, 2
,
,}

1.
Key Laboratory of Integrated Micro-systems, Peking University Shenzhen Graduate School, Shenzhen 518055, China
2.
Peng Cheng Laboratory, Shenzhen 518055, China

Funds: The Subject Layout Program of Shenzhen (JCYJ20220818100814033), The Peacock Plan of Shenzhen (KQTD20200820113105004), The Key-Area Research and Development Program of Guangdong Province (2019B010155002)

Received Date: 2023-04-23
Accepted Date: 2023-08-24
Rev Recd Date: 2023-08-23

Available Online: 2023-08-24

Publish Date: 2023-09-27

Abstract

Abstract

Differential Power Analysis (DPA) is a serious threat to cryptographic hardware and software. The RISC-V processor core based on Wave Dynamic Differential Logic (WDDL) is implemented to mitigate the power leakage. However, the WDDL technique results in a dramatic increase in circuit power. For WDDL-based RISC-V CPU cores, two power suppression techniques are proposed in the paper. Both of them are lightweight solutions. The simulation results show that the circuit power of the DPA-resistant Rocket core with the random precharge enabling technique and the precharge enabling instruction technique can be reduced to 42% and 36.4% of that of the original WDDL based counterpart, respectively.
- Differential Power Analysis (DPA),
- RISC-V core,
- Wava Dynamic Differential Logic (WDDL),
- Power leakage,
- Power suppression

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References(21)

References

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