Chip Collaborative Protection Design Method Based on Piecewise Linear Model for Transmission Line Pulse Transient Interference Signal

FU Lu; YAN Zhaowen; LIU Yuzhu; SU Lixuan

doi:10.11999/JEIT220975

Volume 45 Issue 9

Sep. 2023

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Article Navigation > Journal of Electronics & Information Technology > 2023 > 45(9): 3263-3271

FU Lu, YAN Zhaowen, LIU Yuzhu, SU Lixuan. Chip Collaborative Protection Design Method Based on Piecewise Linear Model for Transmission Line Pulse Transient Interference Signal[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3263-3271. doi: 10.11999/JEIT220975

Citation:

FU Lu, YAN Zhaowen, LIU Yuzhu, SU Lixuan. Chip Collaborative Protection Design Method Based on Piecewise Linear Model for Transmission Line Pulse Transient Interference Signal[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3263-3271. doi: 10.11999/JEIT220975

Citation:

FU Lu, YAN Zhaowen, LIU Yuzhu, SU Lixuan. Chip Collaborative Protection Design Method Based on Piecewise Linear Model for Transmission Line Pulse Transient Interference Signal[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3263-3271. doi: 10.11999/JEIT220975

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Chip Collaborative Protection Design Method Based on Piecewise Linear Model for Transmission Line Pulse Transient Interference Signal

doi: 10.11999/JEIT220975

School of Electronics and Information Engineering, Beihang University, Beijing 100191, China

Funds: The Time Domain Testing System of Electromagnetic Compatibility Conductivity Sensitivity (61427803), The Developing a Behavioral Co-Analysis Methodology for Studying Electromagnetic Susceptibility of 3D IC (TSV) and PCB (61271044)

Received Date: 2022-07-21
Rev Recd Date: 2022-11-18

Available Online: 2022-11-30

Publish Date: 2023-09-27

Abstract

Abstract

With the development trend of miniaturization, high density and high speed of electronic equipment, integrated circuit, as the basic core unit of electronic equipment, is also developing in this direction, which brings more and more serious problems of electromagnetic compatibility. Among them, the problem of electrostatic discharge has attracted more and more attention of designers, producers and users. In this paper, the chip is tested by Transmission Line Pulse (TLP) method, and the volt ampere characteristic data of the device in response to electrostatic discharge interference are obtained. Based on the TLP test data, the piecewise linear modeling method is applied to build the model of the chip to deal with the electrostatic discharge interference. Based on the equivalent circuit of the diode and the volt ampere characteristic data in its data book, the Transient Voltage Suppression (TVS) diode model is constructed and verified by TLP test. At the same time, combined with the above two models, this paper carries out the research on the collaborative protection design method of chip electrostatic discharge interference, and obtains the collaborative protection design process and examples of the chip. This method realizes the collaborative protection design of the chip by simulation, which can save the design cost and time.
- Integrated circuit,
- Electromagnetic compatibility,
- Transmission Line Pulse (TLP),
- Electrostatic discharge,
- Protective design

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References(28)

References

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