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基于分段线性模型针对传输线脉冲瞬态干扰信号的芯片协同防护设计方法

付路 阎照文 刘玉竹 苏丽轩

付路, 阎照文, 刘玉竹, 苏丽轩. 基于分段线性模型针对传输线脉冲瞬态干扰信号的芯片协同防护设计方法[J]. 电子与信息学报, 2023, 45(9): 3263-3271. doi: 10.11999/JEIT220975
引用本文: 付路, 阎照文, 刘玉竹, 苏丽轩. 基于分段线性模型针对传输线脉冲瞬态干扰信号的芯片协同防护设计方法[J]. 电子与信息学报, 2023, 45(9): 3263-3271. doi: 10.11999/JEIT220975
FU Lu, YAN Zhaowen, LIU Yuzhu, SU Lixuan. Chip Collaborative Protection Design Method Based on Piecewise Linear Model for Transmission Line Pulse Transient Interference Signal[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3263-3271. doi: 10.11999/JEIT220975
Citation: FU Lu, YAN Zhaowen, LIU Yuzhu, SU Lixuan. Chip Collaborative Protection Design Method Based on Piecewise Linear Model for Transmission Line Pulse Transient Interference Signal[J]. Journal of Electronics & Information Technology, 2023, 45(9): 3263-3271. doi: 10.11999/JEIT220975

基于分段线性模型针对传输线脉冲瞬态干扰信号的芯片协同防护设计方法

doi: 10.11999/JEIT220975
基金项目: 电磁兼容传导敏感性时域测试系统 (61427803),TSV三维集成电路与电路板电磁敏感度行为级协同分析方法研究 (61271044)
详细信息
    作者简介:

    付路:女,博士生,研究方向为电磁兼容分析、集成电路传导电磁敏感性、传输线脉冲干扰

    阎照文:男,博士,教授,博士生导师,主要研究方向为高速电路信号完整性和电源完整性仿真设计,PCB板级和芯片电磁兼容性精准检测、建模、防护设计

    刘玉竹:女,硕士生,研究方向为芯片电磁兼容精准检测、建模、防护设计、传输线脉冲干扰

    苏丽轩:女,硕士生,研究方向为集成电路传导电磁敏感性、PCB板级和芯片电磁近场发射以及电磁敏感性精准检测、建模

    通讯作者:

    阎照文 yanzhaowen@buaa.edu.cn

  • 中图分类号: TN407

Chip Collaborative Protection Design Method Based on Piecewise Linear Model for Transmission Line Pulse Transient Interference Signal

Funds: The Time Domain Testing System of Electromagnetic Compatibility Conductivity Sensitivity (61427803), The Developing a Behavioral Co-Analysis Methodology for Studying Electromagnetic Susceptibility of 3D IC (TSV) and PCB (61271044)
  • 摘要: 随着电子设备向小型化、高密度和高速的趋势发展,集成电路作为电子设备的基本核心单元也朝着这一方向发展,由此带来了越来越严重的电磁兼容问题。其中静电放电问题越来越引起设计者、制作者和使用者的重视。该文利用传输线脉冲(TLP)方法对芯片进行测试,获取了器件在应对静电放电干扰时的伏安特性数据。基于TLP测试数据应用分段线性建模方法构建了芯片应对静电放电干扰的模型。该文还根据二极管的等效电路及其数据手册的伏安特性数据构建了瞬态电压抑制(TVS)二极管模型,并通过TLP测试进行验证。同时,结合上述两个模型,开展了芯片静电放电干扰的协同防护设计方法研究,并应用实例验证了芯片的协同防护设计方法的可行性。该方法实现了用仿真模拟的方式进行芯片的协同防护设计,能够节约设计成本和时间。
  • 图  1  芯片CD4001BE“输入到地”回路在50 ns脉宽TLP作用下的I-V曲线

    图  2  芯片CD4001B上“输入到地”回路基于TLP测试的实际仿真模型

    图  3  芯片CD4001BE的I-V曲线仿真和测试数据拟合

    图  4  芯片SN74LS04D“输入到地”回路仿真与实测对比

    图  5  稳压二极管等效电路

    图  6  TVS二极管SMDJ13A的仿真模型

    图  7  TVS二极管SMDJ13A I-V曲线仿真与实测比对

    图  8  TVS二极管SMDJ40A I-V曲线仿真与实测比对

    图  9  芯片CD4001BE“输入到地”回路在SMDJ13A的防护下其协同防护仿真模型图

    图  10  CD4001B“输入到地”回路在SMDJ13A防护下的协同防护仿真与实测的I-V曲线对比

    图  11  芯片SN74LS04D“输入到地”回路在SMDJ40A防护下的协同防护仿真与实测的I-V曲线对比

    表  1  模型中的参数

    拐点瞬态电压(V)瞬态电流(A)电阻(Ω)
    000
    131.80.050 1634.730 5
    2440.429–602.532 1
    31023.79–14.941 7
    41134.342.743 231
    51254.882.222 222
    61365.313.359 173
    775.16.69–69.711 83
    下载: 导出CSV

    表  2  TVS 二极管击穿电压参数对比(V)

    序号TVS型号数据手册的击穿
    电压
    实测击穿
    电压
    仿真击穿
    电压
    1SMDJ13A14.4~15.916.3116.57
    2SMDJ40A44.1~49.147.847.52
    下载: 导出CSV

    表  3  TVS 二极管最大钳位电压参数对比(V)

    序号TVS型号数据手册的
    钳位电压
    实测钳位电压仿真钳位电压
    1SMDJ13A21.517.019.5
    2SMDJ40A64.550.352.0
    下载: 导出CSV
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出版历程
  • 收稿日期:  2022-07-21
  • 修回日期:  2022-11-18
  • 网络出版日期:  2022-11-30
  • 刊出日期:  2023-09-27

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