注硅不掺杂半绝缘GaAs中的深能级缺陷
DEEP LEVEL DEFECTS IN Si-IMPLANTED LEC UNDOPED SI-GaAs
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摘要: 用DLTS法对经两步快速热退火(RTA)后的注硅不掺杂SI-GaAs中的缺陷进行了研究。确定了激活层中存在着两个电子陷阱组(以主能级ET1、ET2标记)及其电学参数的深度分布。在体内,ET1=Ec0.53eV,n=2.310-16cm2;ET2=Ec0.81eV,m=9.710-13cm2;密度典型值为NT1=8.01016cm-3,NT2=3.81016cm-3;表面附近,ET1=Ec0.45eV,NT1=1.91016cm-3;ET2=Ec0.71eV,NT2=1.21016cm-3,分别以[AsiVAs,AsGa]和[VAsAsiVGaAsGa]等作为ET1和ET2的缺陷构型解释了它们在RTA过程中的行为。Abstract: DLTS technique has becn used to investigate (4 1012cm-2/30keV+5 1012cm-2/ 130keV)Si implanted LEC undoped SI-GaAs annealed by tow-step rapid thermal annealing (RTA) (970℃/9s +750℃/12s). Two electron traps ET1(Ec- 0.53 eV, 2.3 10-16cm2) and ET2(Ec-0.81eV, 9.710-13cm2) are detected. Furthermore, the noticeable variations of trap s concentration and energy level in the forbidden gap with the depth profile of defects induced by ion implantation and RTA processes have been observed, The [Asi VAsAsGa] and [VAsAsiVGaAsGa] are proposed as the possible atomic configurations of ET1,and ET2 respectively to explain their RTA behavior.
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