nMOS四值触发器的设计及其应用
THE DESIGN OF nMOS QUATERNARY FLIP-FLOPS AND THEIR APPLICATIONS
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摘要: 本文应用限幅电压开关理论设计了两种主从型nMOS四值触发器。这砦触发器具有双端预置能力和双轨互补输出。通过采用JKLM型触发器对十六进制加法计数器和十进制加法计数器的设计实例证明了这些触发器能有效地用于四值时序电路的设计。Abstract: By using the theory of clipping voltage-switches, two kinds of master/slave nMOS quaternary flip-flops are designed.These flip-flops have the capability of two-input presetting and double-rail complementary outputs. A modulo-16 up counter and a modulo-10 up counter are designed by using JKLM type flip-flop. It is shown that these flip-flops can be flexibly used to design quaternary sequential circuits.
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吴训威,陈偕雄.具有三轨输出的三值维持阻塞触发器的研究.科学通报,1986, 31(16): 1380-1383.[2]Xunwei Wu. The theory of clipping voltage-switches and design of quaternary nMOS circuits. IEEE[3]Proc. ISMVL, Sendai: 1992, 119-102.[4]吴训威.指导nMOS电路元件级设计的开关信号理论.电子学报,1993, 21(1): 83-86.[5]Xunwei Wu, Xiaojie Zhao. Design of ternary nMOS circuits based on theory of clipping voltage switches. Int. J. Electronics, 1993, 74(1): 91-102.[6]Vranesic Z B. Multiple-valued logic: An introduction and overiew[J].IEEE Trans. on Computer.1977, C-26(12):1181-1182[7]吴训威.多值逻辑电路设计原理.杭州:杭州大学出版社,1994,19-25.[8]Yasuda Y, et al. Realization of quaternary logic circuits by n-channel MOS devices. IEEE J. of SSC., 1986, SC-21(1): 162-168.[9]吴训威,陈其翔.双端置数技术与高值CMOS触发器设计.电子科学学刊,1994, 16(1): 91-95.[10]吴训威,陈偕雄.具有三轨输出的三值触发器及其在三值时序电路中的应用.中国科学(A辑), 1985, (7): 643-654.[11]吴训威,毕德祥.对基于模代数的三值触发器的研究.电子学报,1984, 12(3): 6-13.
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