Abstract: An instruction set extension for Counter mode with Cipher block chaining Message authentication code protocol using Advanced Encryption Standard algorithm (AES-CCM) protocol in IEEE802.15.4 is presented based on AES fast algorithms and NiosII processor. The logical relationship between the lookup table used for round transformation and S-box is derived, then the S-box value is calculated with composite field transform method in hardware circuit, thereby eliminated the consumption of on-chip memory. The scheme is verified on EP2C35 chip, and the design and experimental data of look-up table method of the instruction set extension design and co-processor are also proposed for compare. This schemes increases the speedup by 174.6 times than software implementation, only uses 223 logic elements as 9.5% of coprocessor, throughput achieves 668.7 kbps, and reduces significantly the cost and power consumption of wireless sensor network node equipments.