Pre-allocated Path Based Low Latency Router Architecture for Network-on-chip
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摘要: 该文针对片上网络提出一种基于提前分配路径的低时延片上路由器结构(PAPR)。新路由器采用提前路由计算和提前分配路径来缩短路由器流水线深度。提前路由计算为虚信道提前分配提供了可靠保障，即使在虚信道路径提前分配失败的情况下，也不影响分组在网络中的传输时延。该文提出基于缓存状态的仲裁算法BSTS(Buffer Status)综合考虑当前节点缓存信息和下游节点缓存信息，不但降低了分组等待时延，而且降低了缓存空闲的概率。仿真结果表明，新路由器能明显改善网络的时延和吞吐性能，相比采用滑动迭代轮询仲裁iSLIP(iterative Round-Robin Matching with SLIP(Serial Line Interface Protocal))算法的经典虚信道路由器，网络平均端到端时延降低了24.5%，吞吐率提高了27.5%；与采用轮询迭代 RRM(Round-Robin Matching) 算法的经典虚信道路由器相比，平均端到端时延降低了39.2%，吞吐率提高了47.2%。路由器硬件开销和平均功耗分别增加仅为8.9%，5.9%。Abstract: A low latency router architecture based Pre-Allocated Path Router (PAPR) is proposed for the Network-on-Chip (NoC). The advanced-routing algorithm and pre-allocated path are implemented to reduce the depth of the pipeline. The pre-allocated virtual channel arbitration is guaranteed by the advanced-routing. The packet transmission time in the network will not be affected even if the pre-allocation of virtual channel arbitration fails. The arbitration algorithm BSTS (Buffer Status ) takes the buffer status of the current node and downstream node into consideration. The new router not only reduces the packet waiting time in the buffer, but also lowers the probabilities of the idle buffer. According to the simulation results, compared with Generic Virtual Channel Router with iSLIP (GVCR-iSLIP) (iterative Round-Robin Matching with Serial Line Interface Protocal (SLIP)), the PAPR reduces the End To End (ETE) delay by 24.5% and improves the throughput by 27.5%; Compared with GVCR with Round-Robin Matching (RRM) (GVCR-RRM), the ETE delay is decreased by 39.2% and the throughput is increased by 47.2%. The router logic unit overhead and the power consumption are only increased by 8.9% and 5.9% respectively.
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