A Novel High-speed Delay-independent Asynchronous to Synchronous Communication Interface
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摘要: 该文提出一种可用于多核片上系统和片上网络的快速延时无关异同步通信接口，由在独特运行协议下工作的环形FIFO实现，可在支持多种数据传输协议的前提下，保证数据从异步模块到同步时钟模块的完整高速传输。在0.18 m标准CMOS工艺下，传输接口的延时为792 ps，平均能耗为4.87 pJ/request，可满足多核片上系统和片上网络芯片高速低功耗、鲁棒性强和重用性好的设计要求。Abstract: This paper proposes a novel delay-independent communication interface used in multiprocessor System- on-Chip (SoC) and Network-on-Chip (NoC). Data can be transferred fast from asynchronous to synchronous through the interface gracefully, which is implemented by the circular FIFO handled under special operation protocol, and various asynchronous transfer protocols are supported. Meanwhile, the communication integrity and high throughput are maintained during transmission. Simulations are made based on SMIC 0.18 m CMOS technology. Results show that the delay is 792 ps with the average energy consumption of 4.87 pJ/request, which can satisfy the requirements of high speed low power, strong robustness and good reusability in Multiprocessor SoC and NoC.
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