可重构存储器无地址冲突的访问机理及比特标识方法研究
doi: 10.3724/SP.J.1146.2010.00463
Conflict-free Access Mechanism and Bit Identifying Technique Research of Reconfigurable Memories
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摘要: 该文着重分析了可重构双端口存储器读写冲突产生的机理,揭示了存储器在可重构条件下地址冲突的依存关系、数据读出映射和路由关系。为实现可重构存储器在无地址冲突下的高性能自由访问,提出了比特标识方法,在发生冲突时缓存一个写入操作,并对数据位的每一比特增加标识位,标识位控制缓存数据向存储核的写入和向存储器外的读出。在0.13m和0.18m主流工艺下的实验结果表明,和其它设计方法比较,面积下降约11%,度提升约21%。采用该方法实现的可重构存储器嵌入到国产百万门级FPGA器件,经测试,达到了无冲突的效果。Abstract: This paper analyzes emphatically the read-write conflict mechanism of reconfigurable memory, and reveals the relations of address conflict, readout mapping and routing of memory under reconfigurable condition. Besides, the paper presents a bit identifying method for achieving the high-powered conflict-free reconfigurable memory. Buffering the writing operations and adding identifying bits for input data when the conflict occurs, the identifying bits use for controlling the data to input to memory core or output to memory. Comparing with another method, the experiment results of verifying in 0.13-m and 0.18-m mainstream CMOS technologies show obvious advantages: area decreases about 11%; speed increases about 21%. This technology has been applied into a homemade million-gate FPGA device, and testing results show it have achieved the conflict-free purpose.
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Key words:
- FPGA /
- Reconfigurable memory /
- Conflict-free access /
- Bit identifying
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