Efficient Storage Method for Real-Time Simulation of Wide-Range Multipath Delay Spread Channels
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摘要: 随着空中平台向通信与感知一体化、成像和环境重构等复杂无线场景的快速发展，对大范围多径时延扩展信道的实时模拟提出了更高要求。现有实时信道模拟方法在处理大范围多径时延扩展信道时，面临硬件存储资源需求急剧膨胀的挑战。针对这一问题，该文提出一种基于动态约束建模的优化稀疏抽头延迟线算法。该算法通过深入分析抽头间的时延依赖关系，精确建立存储器资源占用、所需模拟多径数量与可模拟的多径时延扩展范围三者之间的解析约束关系模型，从而实现了目标性能约束下的资源需求量化设计。理论分析和仿真结果表明，相较于现有算法，所提算法在确保多径时延扩展范围精确模拟的同时，在典型配置下存储空间占用可减少50%以上。这一成果为大范围多径时延扩展实时信道模拟系统设计提供了关键技术支撑。Abstract:
Objective The real-time channel emulator is a critical tool in wireless device research and development, enabling accurate and repeatable experiments in controlled laboratory environments. This capability reduces testing costs by avoiding extensive field trials and accelerates development cycles by allowing rapid iteration and validation of wireless devices under realistic conditions. With the rapid advancement of aerial platforms—including drones, High-Altitude Pseudo-Satellites (HAPS), and Unmanned Aerial Vehicles (UAVs)—for integrated sensing and communication, high-resolution imaging, and environmental reconstruction in complex wireless environments, the challenges of channel modeling have increased considerably. In particular, there is growing demand for real-time simulation of wide-range multipath delay spread channels. Existing simulation methods, although effective in traditional scenarios, face substantial limitations in hardware storage resources when handling such channels. This study addresses these limitations by proposing an efficient storage method for real-time emulation of wide-range multipath channels. The method reduces memory overhead while preserving high fidelity in channel reproduction, thereby offering a practical and optimized solution for next-generation wireless communication research. Methods In conventional real-time channel emulation, a combined simulation approach is adopted, employing cascaded common delay and multipath delay spread components. The common delay component is implemented using a single high-capacity memory module, whereas the multipath delay spread component is implemented using a Dense Tapped Delay Line (D-TDL). This design reduces storage resource requirements by multiplexing the common delay component, but the achievable multipath delay spread range remains limited. Moreover, the multipath delay is constrained by the common delay component, reducing flexibility and compromising the ability to emulate complex scenarios. The Sparse Tapped Delay Line (S-TDL) scheme is used in some algorithms to extend the multipath delay emulation range by cascading block memory modules. However, this method introduces inter-tap delay dependencies and cannot adapt to the requirements of wide-range multipath delay spread channels. Alternatively, Time-Division Multiplexing (TDM) is applied in other algorithms to improve the utilization efficiency of block memory modules and decouple multipath delay control. Despite this, TDM is constrained by the read/write bandwidth of memory, making it unsuitable for real-time channel emulation of large-bandwidth signals. To overcome the multi-tap delay coupling issue in the S-TDL algorithm, an Optimized Sparse Tapped Delay Line (OS-TDL) algorithm is proposed. By analyzing delay-dependent relationships among multipath taps, theoretical derivation establishes an analytical relationship between the number of multipaths and the delay spread range achievable under decoupling constraints. Redundant taps are introduced to eliminate inter-tap delay dependencies, enabling flexible configuration of arbitrary multipath delay combinations. The algorithm formulates a joint optimization model that balances hardware memory allocation and multipath delay spread fidelity, supports wide-range multipath scenarios without being limited by memory read/write bandwidth, and allows real-time emulation of large-bandwidth signals. The central innovation lies in dynamically constraining tap activation and sparsity patterns to reduce redundant memory while preserving wide-range multipath delay spread channel characteristics. Compared with conventional approaches, the proposed algorithm significantly enhances storage resource utilization efficiency in wide-range multipath channel emulation. On this basis, a concrete algorithmic procedure is developed, in which an input multipath delay sequence is computationally processed to derive delay configuration parameters and activation sequences for multiple cascaded memory units. Comprehensive validation procedures for the algorithm are presented in later sections. Results and Discussions Conventional S-TDL algorithms are constrained by inter-tap delay coupling, which limits their ability to achieve high-fidelity emulation of wide-range multipath delay variations. To overcome this limitation, a comparative simulation of three algorithms—the memory resource exclusive algorithm, the TDM memory resource algorithm, and the OS-TDL algorithm proposed herein—is systematically conducted. A controlled variable approach is employed to evaluate storage resource utilization efficiency across three key dimensions: signal sampling rate, number of emulated multipath components, and multipath delay spread range. Theoretical analysis and simulation results show that the proposed OS-TDL algorithm significantly reduces memory requirements compared with conventional methods, while maintaining emulation fidelity. Its effectiveness is further verified through experimental implementation on AMD’s Virtex UltraScale+ series high-performance Field-Programmable Gate Array (FPGA), using the XCVU13P verification platform. Comparative FPGA resource measurements under identical system specifications confirm the superiority of the proposed algorithm, demonstrating its ability to improve memory efficiency while accurately reproducing wide-range multipath delay spread channels. Conclusions This study addresses the challenge of storage resource utilization efficiency in real-time channel emulation for wide-range multipath delay spread by analyzing the inter-tap delay dependency inherent in conventional S-TDL algorithms. An OS-TDL algorithm is proposed to emulate wide-range multipath delay spread channels. Both simulation and hardware verification results demonstrate that the proposed algorithm substantially improves storage efficiency while accurately reproducing multipath wide-range delay spread characteristics. These findings confirm that the algorithm meets the design requirements of real-time channel emulators for increasingly complex verification scenarios. -
表 1 3种算法实现所需FPGA资源对比
算法 LUTs Registers CARRY8 F7 Muxes Block
RAM Tile存储资源独占 745 145 40 0 28 存储资源时分复用 969 1093 40 0 14 优化稀疏抽头延迟线 459 548 31 36 7 
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[1] PAPALAMPROU I, ARMENIAKOS G, STRATAKOS I, et al. Flexible real-time emulation of fading channels on SoC-FPGA devices[C]. 2024 Panhellenic Conference on Electronics & Telecommunications (PACET), Thessaloniki, Greece, 2024: 1–6. doi: 10.1109/PACET60398.2024.10497075. [2] ZHU Qiuming, ZHAO Zikun, MAO Kai, et al. A real-time hardware emulator for 3D non-stationary U2V channels[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2021, 68(9): 3951–3964. doi: 10.1109/TCSI.2021.3087777. [3] YANG Yang, LI Tingpeng, CHEN Xiaomin, et al. Real-time ray-based channel generation and emulation for UAV communications[J]. Chinese Journal of Aeronautics, 2022, 35(9): 106–116. doi: 10.1016/j.cja.2021.12.008. [4] PETRUT I R, IACOBAN R, and BALINT C. CELEOS-SDR based satellite channel emulator[C]. 2024 47th International Conference on Telecommunications and Signal Processing (TSP), Prague, Czech Republic, 2024: 119–122. doi: 10.1109/TSP63128.2024.10605939. [5] RUSCA R, RAVIGLIONE F, CASETTI C, et al. Mobile RF scenario design for massive-scale wireless channel emulators[C]. 2023 Joint European Conference on Networks and Communications & 6G Summit (EuCNC/6G Summit), Gothenburg, Sweden, 2023: 675–680. doi: 10.1109/EuCNC/6GSummit58263.2023.10188319. [6] LI Jingquan, LIU Yu, ZHANG Jingfan, et al. Hardware implementation of a novel UAV multi-trajectory dual-mobility channel emulator[C]. 2024 IEEE Wireless Communications and Networking Conference (WCNC), Dubai, United Arab Emirates, 2024: 1–6. doi: 10.1109/WCNC57260.2024.10570680. [7] KEERATIVORANAN N, SAITO K, and TAKADA J I. Grid-based channel modeling technique for scenario-specific wireless channel emulator based on path parameters interpolation[J]. IEEE Open Journal of the Communications Society, 2024, 5: 1724–1739. doi: 10.1109/OJCOMS.2024.3373538. [8] YANG Yang, ZHU Qiuming, FENG Ruirui, et al. High-efficient ray-based hardware emulator for UAV channel digital twin[C]. 2021 IEEE 21st International Conference on Communication Technology (ICCT), Tianjin, China, 2021: 1486–1490. doi: 10.1109/ICCT52962.2021.9657988. [9] 房胜, 毛开, 王满喜, 等. 基于FPGA的无人机非平稳信道动态模拟研究[J]. 航空兵器, 2024, 31(1): 89–96. doi: 10.12132/ISSN.1673-5048.2023.0087.FANG Sheng, MAO Kai, WANG Manxi, et al. Research on dynamic emulation of non-stationary channel of unmanned aerial vehicles based on FPGA[J]. Aero Weaponry, 2024, 31(1): 89–96. doi: 10.12132/ISSN.1673-5048.2023.0087. [10] 周生奎, 陈应兵, 白云鹏. 基于DDR3的群延迟模拟技术研究与实现[J]. 国外电子测量技术, 2018, 37(8): 82–85. doi: 10.19652/j.cnki.femt.1800875.ZHOU Shengkui, CHEN Yingbing, and BAI Yunpeng. Research and implementation on the group delay simulation based on DDR3[J]. Foreign Electronic Measurement Technology, 2018, 37(8): 82–85. doi: 10.19652/j.cnki.femt.1800875. [11] DONG Shuli, ZHANG Taotao, and WANG Yan. A real-time simulation design of multi-path fading channel based on SOS method[C]. 2019 IEEE 4th Advanced Information Technology, Electronic and Automation Control Conference (IAEAC), Chengdu, China, 2019: 2550–2554. doi: 10.1109/IAEAC47372.2019.8997884. [12] AO Bin, YANG Jingya, HAN Runyu, et al. Channel measurements and sparsity analysis for air-to-ground mmWave communications[C]. ICC 2024 - IEEE International Conference on Communications, Denver, USA, 2024: 1909–1914. doi: 10.1109/ICC51166.2024.10622947. [13] MALIATSOS K N, LOULIS P, CHRONOPOULOS M, et al. The power delay profile of the mobile channel for above the sea propagation[C]. IEEE Vehicular Technology Conference, Montreal, Canada, 2006: 1–5. doi: 10.1109/VTCF.2006.20. [14] MAO Xichen, WANG Chengxiang, and CHANG Hengtai. A 3D non-stationary geometry-based stochastic model for 6G UAV air-to-air channels[C]. 2021 13th International Conference on Wireless Communications and Signal Processing (WCSP), Changsha, China, 2021: 1–5. doi: 10.1109/WCSP52459.2021.9613702. [15] TEHRANI-MOAYYED M, BONATI L, JOHARI P, et al. Creating RF scenarios for large-scale, real-time wireless channel emulators[C]. 2021 19th Mediterranean Communication and Computer Networking Conference (MedComNet), Ibiza, Spain, 2021: 1–8. doi: 10.1109/MedComNet52149.2021.9501275. [16] FU C C, WANG T P, CHANG Kangchuan, et al. A real-time digital baseband channel emulation system for OFDM communications[C]. APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems, Singapore, Singapore, 2006: 984–987. doi: 10.1109/APCCAS.2006.342227. [17] ZHOU Shun, OU Gang, and TANG Xiaomei. Satellite navigation multipath channel sparse reconstruction scheme applied in performance evaluation of constellation channel emulation[C]. 2021 13th International Symposium on Antennas, Propagation and EM Theory (ISAPE), Zhuhai, China, 2021: 1–3. doi: 10.1109/ISAPE54070.2021.9753259. [18] CHAUDHARI A and BRAUN M. A scalable FPGA architecture for flexible, large-scale, real-time RF channel emulation[C]. 2018 13th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip, Lille, France, 2018: 1–8. doi: 10.1109/ReCoSoC.2018.8449390. -
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