5G毫米波反向阵极简构架与CMOS芯片实现

郭嘉诚; 胡三明; 沈一竹; 钱昀; 胡楚悠; 黄永明; 尤肖虎

doi:10.11999/JEIT240143

5G毫米波反向阵极简构架与CMOS芯片实现

doi: 10.11999/JEIT240143

郭嘉诚^{1, 2},
胡三明^{1, 2},
沈一竹^{1, 2},
钱昀¹,
胡楚悠¹,
黄永明^{1, 2},
尤肖虎^{1, 2, ,}

1.
东南大学信息科学与工程学院南京 210096
2.
紫金山实验室南京 211111

基金项目: 国家重点研发计划(2019YFB2204701)，国家自然科学基金(61831006,62250610223)

详细信息

作者简介:
郭嘉诚：男，博士，研究方向为射频、毫米波集成电路设计

胡三明：男，教授，博士生导师，研究方向为射频、毫米波集成电路设计

沈一竹：女，教授，博士生导师，研究方向为毫米波电路及天线

钱昀：女，博士生，研究方向为射频、毫米波集成电路设计

胡楚悠：女，硕士，研究方向为射频、毫米波集成电路设计

黄永明：男，教授，博士生导师，研究方向为下一代移动通信技术

尤肖虎：男，教授，中国科学院院士，研究方向为未来移动通信理论与技术、智能信号处理与通信

通讯作者:
尤肖虎　xhyu@seu.edu.cn

中图分类号: TN43
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- HTML全文浏览量: 245
- PDF下载量: 55
- 被引次数: 0
出版历程
- 收稿日期: 2024-03-06
- 修回日期: 2024-04-29
- 网络出版日期: 2024-05-12
- 刊出日期: 2024-05-30

Simplified Architecture of 5G Millimeter-wave Retrodirective Array and Its Implementation in CMOS Chips

GUO Jiacheng^{1, 2},
HU Sanming^{1, 2},
SHEN Yizhu^{1, 2},
QIAN Yun¹,
HU Chuyou¹,
HUANG Yongming^{1, 2},
YOU Xiaohu^{1, 2
, ,}

1.
School of Information Science and Engineering, Southeast University, Nanjing 210096, China
2.
Purple Mountain Laboratories, Nanjing 211111, China

Funds: The National Key Research and Development Program of China (2019YFB2204701), The National Natural Science Foundation of China (61831006, 62250610223)

摘要

摘要: 该文首次报道了一种极简构架的5G毫米波反向阵设计原理及其CMOS芯片实现技术。该毫米波反向阵极简构架，利用次谐波混频器提供相位共轭和阵列反向功能，无需移相电路及波束控制系统，便可实现波束自动回溯移动通信功能。该文采用国产0.18 μm CMOS工艺研制了5G毫米波反向阵芯片，包括发射前端、接收前端及跟踪锁相环等核心模块，其中发射及接收前端芯片采用次谐波混频及跨导增强等技术，分别实现了19.5 dB和18.7 dB的实测转换增益。所实现的跟踪锁相环芯片具备双模工作优势，可根据不同参考信号支持幅度调制及相位调制，实测输出信号相噪优于–125 dBc/Hz@100 kHz。该文给出的测试结果验证了所提5G毫米波反向阵通信架构及其CMOS芯片实现的可行性，从而为5G/6G毫米波通信探索了一种架构极简、成本极低、拓展性强的新方案。
- 毫米波集成电路 /
- CMOS /
- 反向阵 /
- 射频前端
Abstract: For the first time, a simplified architecture for 5G millimeter-wave retrodirective arrays and its implementation in CMOS chips is reported in this paper. Phase conjugation and retrodirective functions are provided by sub-harmonic mixers in the simplified architecture, eliminating the need for phase-shifting circuits and beam-controlling systems, thereby enabling automatic beam tracking for mobile communications. For validation, a domestic 0.18 μm CMOS process is employed to realize a 5G millimeter-wave retrodirective array chip, comprising core modules such as the transceiver front-ends and tracking phase-locked loop. Measured conversion gains of 19.5 dB for transmitting and 18.7 dB for receiving are achieved by the transceiver front-end chip utilizing sub-harmonic mixing and gm-boosting techniques. Dual-mode operation capabilities, supporting both amplitude modulation and phase modulation based on different reference signals, are provided by the implemented tracking phase-locked loop chip, with measured output signal phase noise lower than –125 dBc/Hz@100 kHz. The feasibility of the proposed 5G millimeter-wave retrodirective array communication architecture and its CMOS chip implementation is validated by the test results presented in this paper, thus offering a new solution for 5G/6G millimeter-wave communication characterized by its extremely simplified architecture, low cost, and high scalability.
- Millimeter-wave integrated circuit /
- CMOS /
- Retrodirective array /
- Radio Frequency (RF) front-end

HTML全文

图 1 反向阵基本架构

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图 2 本文所提5G毫米波反向阵架构

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图 3 接收前端原理图

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图 4 带有补偿电感的等效电路

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图 5 本振网络输出的瞬时仿真波形

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图 6 发射前端原理图

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图 7 5G毫米波反向阵跟踪锁相环结构框图

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图 8 跟踪锁相环中的整形电路

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图 9 5G毫米波频段接收前端芯片显微照片

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图 10 下变频次谐波混频器增益测试结果

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图 11 接收前端增益测试结果

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图 12 5G毫米波频段发射前端芯片显微照片

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图 13 上变频混频器增益测试结果

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图 14 发射前端增益测试结果

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图 15 5G毫米波频段跟踪相环芯片显微照片

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图 16 跟踪锁相环芯片测试

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图 17 跟踪锁相环芯片测试结果

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图 18 跟踪锁相环芯片通信性能测试设置

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图 19 AM调制模式下的测试波形

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图 20 QPSK调制模式下测得的星座图

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表 1 下变频次谐波混频器性能对比总结

	文献[27]	文献[28]	文献[29]	本文
工艺	0.13 μm CMOS	GaInP/GaAs	0.18 μm CMOS	0.18 μm CMOS
频率(GHz)	8.65	10.00	21.00～40.00	22.00～29.00
增益(dB)	6.0	10.0	–8.2	7.0
输入P1dB(dBm)	–18.0	–12.0	–4.0	–11.4
功耗(mW)	0.6	20.0	74.6	30.6

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表 2 低噪声放大器性能对比总结

	文献[30]	文献[31]	文献[32]	本文
工艺	0.18 μm CMOS	0.18 μm CMOS	0.13 μm CMOS	0.18 μm CMOS
中心频率(GHz)	22.0	25.7	24.0	25.0
增益(dB)	15.0	8.9	12.1	12.1
噪声系数(dB)	6.00	6.93	10.40	7.30
功耗(mW)	16.0	30.0	12.0	34.2

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表 3 上变频次谐波混频器性能对比总结

	文献[33]	文献[34]	文献[35]	本文
工艺	65 nm CMOS	0.15 μm CMOS	65 nm CMOS	0.18 μm CMOS
频率(GHz)	27.0～44.0	24.0～44.0	19.5～31.5	23.5～29.5
增益(dB)	–10.5	10.5	–5.1	6.0
输出P1dB(dBm)	–9.0	–11.5	–15.4	–11.8
功耗(mW)	0	225.0	55.6	23.4

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表 4 功率放大器性能对比总结

	文献[36]	文献[37]	本文
工艺	0.18 μm CMOS	0.18 μm CMOS	0.18 μm CMOS
中心频率(GHz)	24	24	25
增益(dB)	7.0	11.0	14.5
输出P1(dB)	11.0	10.0	4.5
功耗(mW)	100	42	118

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表 5 反向阵构架对比总结

	文献[38]	文献[39]	文献[10]	文献[19]	文献[22]	本文
芯片集成	×	×	×	√	√	√
工作频段(GHz)	6.0	5.8	1.5	2.4	2.4	5G毫米波(26.0 GHz频段)
调制方式及速率	BPSK 78.125 kB/s	AM 10 MB/s	16QAM 151.2 kB/s	×	AM 100 kB/s	AM 100 kB/s QPSK 1 MB/s

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