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基于亚稳态叠加单元的高吞吐量真随机数发生器设计

倪天明 俞俊勇 彭青松 聂牧

倪天明, 俞俊勇, 彭青松, 聂牧. 基于亚稳态叠加单元的高吞吐量真随机数发生器设计[J]. 电子与信息学报, 2024, 46(5): 2289-2297. doi: 10.11999/JEIT231166
引用本文: 倪天明, 俞俊勇, 彭青松, 聂牧. 基于亚稳态叠加单元的高吞吐量真随机数发生器设计[J]. 电子与信息学报, 2024, 46(5): 2289-2297. doi: 10.11999/JEIT231166
NI Tianming, YU Junyong, PENG Qingsong, NIE Mu. Design of High Throughput True Random Number Generator Based on Metastability Superposition Cells[J]. Journal of Electronics & Information Technology, 2024, 46(5): 2289-2297. doi: 10.11999/JEIT231166
Citation: NI Tianming, YU Junyong, PENG Qingsong, NIE Mu. Design of High Throughput True Random Number Generator Based on Metastability Superposition Cells[J]. Journal of Electronics & Information Technology, 2024, 46(5): 2289-2297. doi: 10.11999/JEIT231166

基于亚稳态叠加单元的高吞吐量真随机数发生器设计

doi: 10.11999/JEIT231166
基金项目: 国家自然科学基金(62174001, 62274052, 61974001, 62311540021),安徽省自然科学基金(2208085J02),安徽省重点研发(202104b11020032),安徽省高校优秀科研创新团队(2022AH010059),安徽省教育厅杰出青年学者基金(2022AH020014)
详细信息
    作者简介:

    倪天明:男,教授,研究方向为集成电路容错设计、数字集成电路抗辐射加固设计及硬件安全

    俞俊勇:男,硕士生,研究方向为硬件安全

    彭青松:男,硕士生,研究方向为硬件安全

    聂牧:男,博士,讲师,研究方向为机器学习与晶圆检测

    通讯作者:

    聂牧 niemu@seu.edu.cn

  • 中图分类号: TN402

Design of High Throughput True Random Number Generator Based on Metastability Superposition Cells

Funds: The National Natural Science Foundation of China (62174001, 62274052, 61974001, 62311540021), Anhui Provincial Natural Science Foundation (2208085J02), The Key Research and Development Projects in Anhui Province (202104b11020032), The Excellent Scientific Research and Innovation Teams of Anhui Province (2022AH010059), The Distinguished Young Scholar Fund of Anhui Provincial Department of Education (2022AH020014)
  • 摘要: 真随机数发生器(TRNG)作为一类重要的硬件安全原语,在密钥生成、初始化向量和协议中的身份认证等加密领域得到应用。为设计出高吞吐量的轻量级TRNG,该文研究了利用多路选择器(MUX)和异或门(XOR gate)的开关特性来产生亚稳态的方法,提出一种基于亚稳态叠加单元(MS-cell)的TRNG(MS-TRNG)设计。它将MUX和异或门触发的亚稳态进行叠加,从而提高TRNG的熵。所提TRNG分别在Xilinx Virtex-7和Xilinx Artix-7 FPGA开发板中实现,无需后处理电路。与其他先进的TRNG相比,所提TRNG具有最高的吞吐量和极低的硬件开销,并且它所生成的随机序列通过了NIST测试和一系列性能测试。
  • 图  1  一种流行的亚稳态电路模型

    图  2  采用MUX实现的基于亚稳态的TRNG

    图  3  异或门的开关特性

    图  4  采用异或门实现的基于亚稳态的TRNG

    图  5  MS-cell电路图

    图  6  两类数字元件触发的亚稳态

    图  7  抖动的累积效应

    图  8  异或组合结构

    图  9  退化后的异或函数

    图  10  MS-TRNG的完整结构

    图  11  106位输出序列的偏差测试

    图  12  6次重启动测试结果

    图  13  106位输出序列的自相关测试

    图  14  不同电压下NIST测试结果

    图  15  不同温度下NIST测试结果

    表  1  MS-cell的工作模式

    SEL脉冲IN脉冲熵源
    ×反相器触发的抖动
    0×反相器触发的抖动
    MUX与异或门触发的亚稳态叠加
    0MUX触发的亚稳态
    异或门触发的抖动
    1异或门触发的抖动
    1异或门触发的亚稳态
    10无熵源(保持)
    1异或门触发的抖动
    11异或门触发的抖动
    下载: 导出CSV

    表  2  NIST SP 800-22测试结果

    测试项目 Artix-7 Virtex-7
    P 通过率 总体 P 通过率 总体
    近似熵检测 0.503917 99 通过 0.509126 98 通过
    块内频数检测 0.510257 100 通过 0.480771 98 通过
    累加和检测 0.537681 100 通过 0.466125 98 通过
    离散傅里叶变换检测 0.454209 99 通过 0.522061 100 通过
    频率检测 0.546769 99 通过 0.460289 98 通过
    线性复杂度检测 0.461250 99 通过 0.474038 98 通过
    块内最长运行检测 0.510434 100 通过 0.522953 99 通过
    非重叠模板匹配检测 0.495718 99 通过 0.500575 99 通过
    重叠模板匹配检测 0.465718 99 通过 0.507311 99 通过
    随机偏移检测 0.271823 98 通过 0.310572 99 通过
    随机偏移变化检测 0.270109 99 通过 0.315353 98 通过
    2元矩阵秩检测 0.526488 98 通过 0.495522 100 通过
    运行检测 0.550720 97 通过 0.554121 98 通过
    序列检测 0.496321 97 通过 0.515058 100 通过
    通用统计检测 0.478454 100 通过 0.476515 99 通过
    下载: 导出CSV

    表  3  NIST SP 800-90B Non-IID测试结果

    测试项目 Artix-7 Virtex-7
    P (max) h-min P (max) h-min
    最频值 0.501712 0.995069 0.501694 0.995120
    碰撞 0.537109 0.896712 0.539062 0.891476
    马尔可夫 4.0306e–39 0.996439 4.4813e–39 0.995244
    压缩 0.5 1 0.506836 0.980409
    元组 0.526629 0.925141 0.519390 0.945111
    最长重复字串长度 0.502963 0.991475 0.501607 0.995369
    多个MCW 0.501673 0.995182 0.500678 0.998046
    滞后 0.500954 0.997251 0.500901 0.997404
    多个MMC 0.500685 0.998025 0.501520 0.995621
    LZ78Y算法 0.501425 0.995896 0.500968 0.997211
    下载: 导出CSV

    表  4  NIST SP 800-90B IID测试结果

    测试项目Artix-7 ResultVirtex-7 Result
    IID 置换检验通过通过
    卡方独立检验通过通过
    卡方拟合优度检验通过通过
    最长重复字串长度测试通过通过
    重启动测试通过通过
    最小熵测试0.9950690.995120
    下载: 导出CSV

    表  5  与其他先进TRNG的对比

    方法 熵源 硬件资源 吞吐量(Mbit/s) 功耗(mW) 后处理电路
    [9] 抖动 50LUTs/79FFs 280.0
    [12] 抖动 56LUTs/19FFs 100.0 1.150
    [14] 抖动 24LUTs/2FFs 290.0 3703.000
    [16] 抖动 32LUTs/55FFs/33Slices 12.5 9.514
    [19] 亚稳态 38LUTs/121FFs/38Slices 300.0 119.000
    [24] 抖动+亚稳态 271LUTs/199Cells 1.0 90.000
    [25] 抖动+亚稳态 36LUTs/0FFs 12.5
    [26] 抖动 37LUTs/25FFs 160.0
    本文 抖动+亚稳态 29LUTs/4FFs 500.0 123.000
    下载: 导出CSV
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出版历程
  • 收稿日期:  2023-10-26
  • 修回日期:  2024-01-26
  • 网络出版日期:  2024-02-03
  • 刊出日期:  2024-05-30

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