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基于SRAM的感存算一体化技术综述

杨兴华 杨子翼 苏海津 姜炜煌 张静 魏琦 骆丽 王忠静 吕华芳 乔飞

杨兴华, 杨子翼, 苏海津, 姜炜煌, 张静, 魏琦, 骆丽, 王忠静, 吕华芳, 乔飞. 基于SRAM的感存算一体化技术综述[J]. 电子与信息学报, 2023, 45(8): 2828-2838. doi: 10.11999/JEIT220815
引用本文: 杨兴华, 杨子翼, 苏海津, 姜炜煌, 张静, 魏琦, 骆丽, 王忠静, 吕华芳, 乔飞. 基于SRAM的感存算一体化技术综述[J]. 电子与信息学报, 2023, 45(8): 2828-2838. doi: 10.11999/JEIT220815
YANG Xinghua, YANG Ziyi, SU Haijin, JIANG Weihuang, ZHANG Jing, WEI Qi, LUO Li, WANG Zhongjing, LÜ Huafang, QIAO Fei. Review of the Fused Technology of Sensing, Storage and Computing Based on SRAM[J]. Journal of Electronics & Information Technology, 2023, 45(8): 2828-2838. doi: 10.11999/JEIT220815
Citation: YANG Xinghua, YANG Ziyi, SU Haijin, JIANG Weihuang, ZHANG Jing, WEI Qi, LUO Li, WANG Zhongjing, LÜ Huafang, QIAO Fei. Review of the Fused Technology of Sensing, Storage and Computing Based on SRAM[J]. Journal of Electronics & Information Technology, 2023, 45(8): 2828-2838. doi: 10.11999/JEIT220815

基于SRAM的感存算一体化技术综述

doi: 10.11999/JEIT220815
基金项目: 国家自然科学基金(92164203),清华大学-宁夏银川水联网数字治水联合研究院基金项目(SKL-IOW-2020TC2003)
详细信息
    作者简介:

    杨兴华:男,讲师,研究方向为近似计算电路系统设计

    张静:女,教授,研究方向为智能传感技术、第三代半导体器件

    魏琦:男,副研究员,研究方向为集成电路设计

    骆丽:女,教授,研究方向为微电子学与固体电子学

    王忠静:男,教授,研究方向为水利物联网感知

    吕华芳:女,高级工程师,研究方向为水利物联网感知

    乔飞:男,副研究员,研究方向为智能感知集成电路与系统

    通讯作者:

    杨子翼 yangziyi0128@gmail.com

  • 中图分类号: TN403

Review of the Fused Technology of Sensing, Storage and Computing Based on SRAM

Funds: The National Natural Science Foundation of China (92164203),The Tsinghua University-Ningxia Yinchuan Water Network Digital Water Control Joint Research Institute Fund Project (SKL-IOW-2020TC2003)
  • 摘要: 基于SRAM(静态随机存取)存储器的感存算一体化芯片架构将传感、存储和计算功能结合,通过使存储单元具备计算能力,避免了计算过程中数据的搬移,解决了冯诺依曼架构所面临的“存储墙”的问题。该结构与传感器部分结合,可以实现超高速、超低功耗的运算能力。SRAM存储器相较于其他存储器在速度方面具有较大优势,主要体现在该架构能够实现较高的能效比,在精度增强后可以保证较高精度,适用于低功耗高性能要求下的大算力场景设计。该文调研了近几年来关于感存算一体化的研究,介绍了传统感知系统和持续感知系统及感算共融系统,并介绍了基于SRAM存储器的感存算一体芯片最常见的几种计算单元结构,在电压域、电荷域和数字域考察了基于SRAM的感存算一体的研究发展,进行分析对比其优劣势,结合调研分析讨论了该领域的未来发展方向。
  • 图  1  传统感知系统的处理流程

    图  2  持续感知系统与传统感知系统的功耗模式对

    图  3  SRAM 6T单元电路

    图  4  分裂式6T SRAM单元结构

    图  5  4+2T 存储器单元结构

    图  6  双7T SRAM 单元

    图  7  8T SRAM单元电路

    图  8  SRAM 9T单元电路

    图  9  开关电容阵列实现电荷域计算

    图  10  电荷域计算10T单元

    图  11  电荷域计算10T单元

    图  12  串行计算的可重构数字存内计算体系结构

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出版历程
  • 收稿日期:  2022-06-21
  • 修回日期:  2022-12-10
  • 录用日期:  2022-12-20
  • 网络出版日期:  2022-12-23
  • 刊出日期:  2023-08-21

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