A True Random Number Design of Low Power and High Noise Source
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摘要: 通过对一种低功耗高噪声源真随机数发生器(TRNG)的研究,设计了一种新型的低频时钟电路,可以把电阻热噪声放大100倍以上,从而减少低频时钟电路的带宽和电阻值,使电路的面积和功耗减少,并且使低频时钟的jitter到达58.2 ns。电路采用SMIC 40 nm CMOS工艺设计,完成了流片和测试,真随机数产生器输出速度范围为1.38~3.33 Mbit/s,电路整体功耗为0.11 mW,面积为0.00789 mm2。随机数输出满足AIS31真随机数熵源测试要求,并且通过了国密2安全测试。
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关键词:
- 真随机数产生器 /
- 电阻热噪声 /
- 低频时钟jitter /
- 低功耗
Abstract: Through the research of a True Random Number Generator (TRNG), which is a low-power and high-noise source, a new type of low-frequency clock is designed. It can amplify the thermal noise of resistance more than 100 times, thus reducing the bandwidth and resistance value of the circuit, reducing the area and power consumption of the circuit, and making the jitter of low-frequency clock reach 58.2 ns. The circuit is designed by SMIC 40 nm CMOS technology. The flow sheet and test are completed. The output speed of TRNG ranges from 1.38 to 3.33 Mbit/s. The overall power consumption of the circuit is 0.11 mW and the area is 0.00789 mm2. The output of random number meets the test requirement of AIS31 true random number entropy source, and passes the security test of National Secret 2. -
表 1 两种结构下噪声电阻值和功耗
指标 噪声电阻值
(Ω)信号增益A1(倍) 信号增益A2(倍) 噪声带宽(MHz) 功耗(mW) 跨阻放大器结构 64 k 1 100 1 0.081 电压放大器结构 2 M 5 5 80 0.220 表 2 低频时钟频率仿真结果
指标 仿真结果 MIN TYP MAX 输出频率(MHz) 1.38 2.13 3.34 Jitter(σ{Tcl})(ns) 77.89 58.2 40 功耗(mW) 0.055 0.081 0.110 表 3 高频时钟频率仿真结果
仿真 HOSC频率 MIN TYP MAX 频率(GHz) 0.186 0.25 0.313 功耗(mW) 0.017 0.024 0.035 占空比(%) 50.09 50.28 50.43 -
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