FPGA Design and Implementation of Large Integer Multiplier
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摘要: 大整数乘法是公钥加密中最为核心的计算环节，实现运算快速的大数乘法单元是RSA, ElGamal，全同态等密码体制中急需解决的问题之一。针对全同态加密(FHE)应用需求，该文提出一种基于Schönhage-Strassen算法(SSA)的768 kbit大整数乘法器硬件架构。采用并行架构实现了其关键模块64k点有限域快速数论变换(NTT)的运算，并主要采用加法和移位操作以保证并行处理的最大化，有效提高了处理速度。该大整数乘法器在Stratix-V FPGA上进行了硬件验证，通过与CPU上使用数论库(NTL)和GMP库实现的大整数乘法运算结果对比，验证了该文设计方法的正确性和有效性。实验结果表明，该方法实现的大整数乘法器运算时间比CPU平台上的运算大约有8倍的加速。Abstract: Large integer multiplication is the most important part in public key encryption, which often consumes most of the computing time in RSA, ElGamal, Fully Homomorphic Encryption (FHE) and other cryptosystems. Based on Schönhage-Strassen Algorithm (SSA), a design of high-speed 768 kbit multiplier is proposed. As the key component, an 64k-point Number Theoretical Transform (NTT) is optimized by adopting parallel architecture, in which only addition and shift operations are employed and thus the processing speed is improved effectively. The large integer multiplier design is validated on Stratix-V FPGA. By comparing its results with CPU using Number Theory Library(NTL) and GMP library, the correctness of this design is proved. The results also show that the FPGA implementation is about eight times faster than the same algorithm executed on the CPU.
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Key words:
- Fully Homomorphic Encryption (FHE) /
- FPGA /
- Large number multiplication /
- GMP library
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表 1 主要大整数乘法算法时间复杂度
算法 时间复杂度 grammar-school $O({N^2})$ Karatsuba-Ofman $O({N^{\ln 3/\ln 2}})$ Toom-Cook $O({N^{\ln (2k - 1)/\ln (k)}})$ Schönhage-Strassen (SSA) $O(N\log N\log \log N)$ 
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表 3 Stratix-V FGPA综合结果
逻辑单元 Stratix V 占用资源数 总资源数 利用率(%) ALUTs 240229 718400 33 Logic registers 236088 1436800 16 Total block Memory (bit) 16252928 54067200 30 Total DSP blocks 288 352 82 最大频率(MHz) 98.02
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