基于存储划分和路径重用的粗粒度可重构结构循环映射算法

张兴明; 袁开坚; 高彦钊

doi:10.11999/JEIT170748

基于存储划分和路径重用的粗粒度可重构结构循环映射算法

doi: 10.11999/JEIT170748

基金项目:

国家科技重大专项(2016ZX01012101)，国家自然科学基金(61572520, 61521003)

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- 被引次数: 0
出版历程
- 收稿日期: 2017-07-21
- 修回日期: 2017-12-18
- 刊出日期: 2018-06-19

Coarse Grained Reconfigurable Architecture Loop Mapping Algorithm Based on Memory Partitioning and Path Reuse

Funds:

The National Science Technology Major Project (2016ZX01012101), The National Natural Science Foundation of China (61572520, 61521003)

摘要

摘要: 目前针对粗粒度可重构结构循环映射的研究主要集中在操作布局和临时数据路由，缺乏考虑数据映射的研究，该文提出一种基于存储划分和路径重用的模调度映射流程。首先进行细粒度的存储划分找到合适的数据映射，提高数据存取的并行性，再用模调度寻找操作布局和临时数据路由，最后利用构建的路由开销模型平衡存储器路由和处理单元路由的使用，引入路径重用策略优化路由资源。实验结果表明，该方法在循环的启动间隔、每周期指令数和执行延迟等方面均具有良好的性能。
- 粗粒度可重构结构 /
- 循环映射 /
- 存储划分 /
- 路径重用
Abstract: The current research on Coarse Grained Reconfigurable Architecture (CGRA) loop mapping mainly focuses on operation placement and data routing, but seldom involves data mapping. To solve this problem, a mapping flow based on memory partitioning and path reuse is designed. Firstly, fine grained memory partitioning is used to find the data placement improving the parallelism of data access. Secondly, placement and routing is searched by modulo scheduling. Finally, the routing overhead model is used to balance memory routing and processing unit routing and path reuse strategy is introduced to optimize routing resources. Experimental results validate the performance of proposed approach in initiation interval, instruction per cycle and execution delay.
- Coarse Grained Reconfigurable Architecture (CGRA) /
- Loop mapping /
- Memory partitioning /
- Path reuse

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参考文献(13)

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