基于缓存行为特征的线程数据预取距离控制策略

黄艳; 张启坤; 段赵磊; 古志民

doi:10.11999/JEIT141429

基于缓存行为特征的线程数据预取距离控制策略

doi: 10.11999/JEIT141429

1.
(郑州轻工业学院软件学院郑州 450002)
2.
(郑州轻工业学院计算机与通信工程学院郑州 450002)
3.
(北京理工大学计算机学院北京 100081)

基金项目:

国家自然科学基金(61370062)，郑州市科技攻关计划项目(20130725)和博士基金项目(2013BSJJ050)资助课题

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- 被引次数: 0
出版历程
- 收稿日期: 2014-11-13
- 修回日期: 2015-03-17
- 刊出日期: 2015-07-19

Prefetch Distance Control Strategy Based on Cache Behavior in Threaded Prefetching

1.
(Department of Software Engineering, Zhengzhou University of Light Industry, Zhengzhou 450002, China)
2.
(College of Computer and Communication Engineering, Zhengzhou University of Light Industry, Zhengzhou 450002, China)

摘要

摘要: 针对目前大多数面向指针应用程序的线程数据预取方法在预取距离控制方面的不足，该文提出一种基于缓存行为特征的数据预取距离控制策略。该策略利用指针应用程序执行时的数据缓存特征构建预取距离控制模型，以避免共享缓存污染，降低系统资源竞争，并通过忽略对部分非循环依赖数据预取平衡帮助线程与主线程间的执行任务，提高线程数据预取的时效性。实验结果表明，通过该策略控制线程数据预取距离能进一步提高线程预取性能。
- 片上多处理器 /
- 线程预取 /
- 帮助线程 /
- 预取率 /
- 预取距离
Abstract: Due to the deficiencies in prefetch distance controlling of most threaded data prefetching methods for pointer application, a prefetch distance control strategy based on the cache behavior characteristics is proposed. In this paper, the prefetch distance control model is constructed using the runtime data cache features of pointer applications to reduce cache pollution and system resources contention. By skipping loop-carried independencies data accesses, the task between main thread and helper thread is balanced and the timeliness of threaded prefetching is improved. The experimental results show that the proposed approach can optimize the performance of threaded prefetching mechanism.
- Chip Multi-Processors (CMP) /
- Threaded prefetching /
- Helper thread /
- Prefetch ratio /
- Prefetch distance

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参考文献(24)

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