低功耗Clock-Gating技术在SAR实时成像处理中的应用
Low Power Clock-Gating Method and Its Applications in SAR Real-Time Processor
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摘要: 功耗问题在SAR实时成像系统中是不容忽视的。该文以实时成像系统中的输入分机为研究平台,测试了信号处理中常用芯片DSP,SBSRM,FPGA在采用Clock-gating技术前后,功耗的变化。通过大量的实验结果,验证了Clock-gating技术在SAR实时信号处理中的可行性,对降低SAR实时成像系统,尤其是星载实时成像系统的功耗有一定的指导意义。Abstract: Power consumption has to be taken into consideration in an applied SAR real-time processor. The power consumption is measured before and after clock-gating method had been applied to DSP, SBSRAM and FPGA of an air-borne SAR real-time preprocessor board respectively by software. It has been proved that clock-gating method is feasible for low power design in the SAR especially the future space-borne SAR real-time processor.
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