Round robin调度算法在FPGA中的实现
The FPGA implementation of the round robin scheduling algorithms
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摘要: Round robin调度算法是一个在许多方面有着广泛应用的经典调度算法。该文在考虑了FPGA的结构特点和实际系统需求后，利用桶式移位器和分段式优先级编码器，在FPGA中实现了Round robin调度算法，并对实现方法的面积和性能进行了讨论。系统测试结果表明该算法实现是高效的，满足了系统的需求，在实际系统中运行状况良好。Abstract: Round robin scheduling algorithm is a classic scheduling algorithm with many ap-plications. An FPGA implementation by using barrel shifter and pipelined priority encoder is presented in this paper with considering the FPGA structure characteristic and systems requirement. And the performance and resource consumption of the implementation are dis-cussed. The test result shows that the implementation of the algorithm is effective and fit for the FPGA structure. The system with the implementation of algorithm runs very well.
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M.G.H. Katevenis, Fast switching and fair control of congested flow in broadband networks,IEEE on Selected Areas Comm., 1987, SAC-5(8), 1315-1326.[2]The Programmable Logic Data Book 2000, Xilinx Incorporation, 2000, Section 3.[3]夏宇闻,复杂数字电路与系统的Verilog HDL设计技术,北京,北京航空航天大学出版社,1998,第二章,第四章. -
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