内插在码元同步中的应用及实现
Interpolation in Symbol Synchronization and Its Implementation
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摘要: 在采样时钟固定且采样速率受限的情况下接收机的采样时刻不一定在信号的最佳判决点，此时码元判决受ISI影响较为严重。该文以数字内插理论为基础，提出了利用内插提高码元同步精度的方法，讨论了内插滤波器的特性及其基于多相分解的硬件实现结构。
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关键词:
- 码元同步; 内插; 内插滤波器
Abstract: The sampling time of the receiver might miss the best decision point when sampling clock is fixed and rate of sampling is limited. Under this circumstances, symbol decision is affected badly by ISI. In this paper, a method of enhancing the precision of symbol synchronization using interpolator is introduced based on theory of digital interpolation, and the feature of the interpolation filter and its efficient implementation structure based on polyphase decomposition is discussed. -
Gardner F M. Interpolation in digital modems-Part Ⅰ:Fundamentals [J].IEEE Trans. on Commun.1993, 41(3):501-[2]Proakis J G. Digital Communications. Fourth Edition, New York:McGraw- Hill Companies Inc, 2001: 559 - 561.[3]Crochiere R E, Rabiner L R. Interpolation and decimation of digital dignals-A tutorial review[J].Proc IEEE.1981, 69(3):300-[4]宗孔德.多抽样率信号处理.北京:清华大学出版社,1996:37-47.[5]Xilinx Inc. Virtex-Ⅱ Platform FPGA Handbook. San Jose, CA.,2001. -
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