用线性电压扫描的电容-时间瞬态测定少子产生寿命
DETERMINATION OF GENERATION LIFETIME FROM C-t TRANSIENTS UNDER LINEAR VOLTAGE RAMP BIAS
-
摘要: 本文建议用耗尽的线性扫描电压扫描MOS电容样品。扫描开始前MOS电容被置于强反型态,以消除表面产生的影响。根据扫描所得的电容-时间瞬态曲线,可确定样品中少于产生寿命。实验表明,对于同一个MOS电容样品,不同电压扫描率下得到的结果有很好的一致性,且与饱和电容法的结果相符合。
-
关键词:
- 半导体; MOS电容; 少子产生寿命
Abstract: When a linear voltage ramp applied to the gate of an MOS device the C-t transients are observed. Before the voltage ramp is applied the MOS capacitor is biased into strong inversion in order to eliminate the surface generation. From the C-t transient curve obtained experimentally, the minority carrier generation lifetime in semiconductor can be determined. The experimental results show that for the same sample the lifetimes extracted from the C-t curves obtained under different voltage sweep rates are consistent each other, and they are consistent with the lifetimes extracted fdom saturation capacitance method. -
M. Zerbst,Z.angew. Phys., 22 (1966)l,30-33.[2]R.F.Pierret, IEEE Trans. on ED, ED-19(1972)7,869-873.[3]R.F.Pierret, IEEE Trans. on ED, ED-22(1975)9, 1051-1052.[4]包宗明,苏九令,物理学报,29(1980)6,693-697.[5]K.S.Rabbani, D.R.Lamb, Solrd-State Etectronics, 24(1981)6,661-664.[6]张秀淼,包宗明,苏九令,物理学报,32(1983)2,239-246.[7]张秀淼,贺国根,半导体学报,4(1983) 5,444-448.[8]D. K. Schroder, H. C. Nathanson, Solid-Staze Electronics, 13(1970)5, 577-581.[9]D. K. Schroder, J. Guldberg, Solid- State Electronics, 14(1971) 12, 1285-1297.[10]P. U. Calzolari, S.Graffi, C. Morandi, Solid-State Etectronics,17(1974) 10. 1001-1011.[11]K.S.Rabbani, Solid-State Etectronics, 30(1987)6, 607-613.[12]P. G. C. Allman, IEE Proc.-I, 129(1982)4, 121-124.[13]X. Zhang, Solid-State Electronics, 33(1990)9, 1139-1142.[14]C.S.Yue, H. Vyas, M. Holt,J.Borowick, Solid-State Electronics, 28(1985)4, 403-406. -
计量
- 文章访问数: 2373
- HTML全文浏览量: 108
- PDF下载量: 490
- 被引次数: 0
下载:
