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受主型界面态在深亚微米槽栅PMOSFET中引起退化的研究

任红霞 郝跃

任红霞, 郝跃. 受主型界面态在深亚微米槽栅PMOSFET中引起退化的研究[J]. 电子与信息学报, 2002, 24(1): 108-114.
引用本文: 任红霞, 郝跃. 受主型界面态在深亚微米槽栅PMOSFET中引起退化的研究[J]. 电子与信息学报, 2002, 24(1): 108-114.
Ren Hongxia, Hao Yue. Study on the degradation induced by acceptor interface state for deep-sub-micron grooved-bate PMOSFET\s[J]. Journal of Electronics & Information Technology, 2002, 24(1): 108-114.
Citation: Ren Hongxia, Hao Yue. Study on the degradation induced by acceptor interface state for deep-sub-micron grooved-bate PMOSFET\s[J]. Journal of Electronics & Information Technology, 2002, 24(1): 108-114.

受主型界面态在深亚微米槽栅PMOSFET中引起退化的研究

Study on the degradation induced by acceptor interface state for deep-sub-micron grooved-bate PMOSFET\s

  • 摘要: 界面态引起的器件特性的退化是深亚微米器件失效的一个重要因素。本文基于流体动力学能量输运模型,对沟道杂质浓度不同的槽栅和平面PMOSFET中受主型界面态引起的器件特性的退比进行了分析。研究结果表明同样浓度的界面态密度在槽栅器件中引起的器件特性的漂移远大于平面器件,且P型受主型界面态密度对器件特性的影响也远大于N型界面态。沟道杂质浓度不同,界面态引起的器件特性的退化不同。
  • C. Hu, Simulating hot-carrier effects on circuit performance, Semiconductor Science Technology,1992, 7(3), B555-B558.[2]J.E. Chung, M. Jeng, J. E. Moon, P. K. Ku, C. Hu, Low-voltage hot-electron currents and degradation in deep-sub-micrometer MOSFETs, IEEE Trans. on Electron Devices, 1990, 37(7),1651-1657.[3]C. Fiegna, H. Iwai, T. Wada, et al., Scaling the MOS transistor below 0.1 m: Methodology,device structures, and technology requirements, IEEE Trans. on Electron Devices, 1994, 41(6),941-949.[4]C. Hu, S. Tam, F. C. Hsu, P. K. Ko, T. Y. Chan, K. W. Terrill, Hot-electron-induced MOSFET degradation-model, monitor and improvement, IEEE Trans. on Electron Devices, 1985, 32(2),375-385.[5]H.I. Kimura, J. Tanaka, H. Noda, Short-channel-effect-suppressed sub-0.1-m grooved-gate MOSFETs with W gate, IEEE Trans. on Electron Devices, 1995, 42(1), 94-99.[6]Paul-Henri Bricout, Emmanuel Dubois, Short-channel effect immunity and current capability of sub-0.1-micron MOSFETs using a recessed channel, IEEE Trans. on Electron Devices, 1996,43(8), 1251-1255.[7]R. Woltjer, G. M. Paulzen, H. G. Pomp, H. Lifka, P. H. Woerlee, Three hot-carrier degradation mechanisms in deep-submicron PMOSFETs, IEEE Trans. on Electron Devices, 1995, 42(1),109-114.[8]Technology Modeling Associates, Inc. Medici Two-Dimensional Device Simulation Program Version 2.3 Users Manual, Vol.1, Feb 1997Technology Modeling Associates, Inc. TSUPREM-4 Two-Dimensional Process Simulation Program Version 6.5 User Manual , May 1997[9]S. Tam, P. Ko, C. Hu, Luck-electron model of channel hot-electron injection in MOSFETs, IEEE Trans. on Electron Devices, 31(9), 1984, 1116-1125.[10]任红霞,郝跃,许冬岗,槽栅NMOSFET抗热载流子效应的研究,物理学报,2000,49(7),741-748.
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出版历程
  • 收稿日期:  2000-02-23
  • 修回日期:  2000-07-06
  • 刊出日期:  2002-01-19

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