A Stable Fixed-outline Floorplanning Algorithm for Soft Module
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摘要: 该文提出一种稳定的面向软模块的固定边框布图规划算法。该算法基于正则波兰表达式(Normalized Polish Expression, NPE)表示,提出一种基于形状曲线相加和插值技术的计算NPE最优布图的方法,并运用模拟退火(Simulation Annealing, SA)算法搜索最优解。为了求得满足固定边框的布图解,提出一种基于删除后插入(Insertion After Delete, IAD)算子的后布图优化方法。对8个GSRC和MCNC电路的实验结果表明,所提出算法在1%空白面积率的边框约束下的布图成功率接近100%,在总线长上较已有文献有较大改进,且在求解速度上较同类基于SA的算法有较大优势。Abstract: A stable Fixed-Outline Floorplanning (FOF) algorithm for soft module is proposed in this paper. It takes the Normalized Polish Expression (NPE) as a floorplan solution, using the shape curve adding algorithm and the interpolation technique to compute the best floorplan of a NPE. The Simulated Annealing (SA) algorithm is used to search the solution space. A post-floorplanning optimization method based on the new Insertion After Delete (IAD) operator is adopted to optimize those SA floorplan solutions which fail to meet the fixed-outline constraints. The experimental results on eight GSRC and MCNC benchmarks show that the proposed algorithm can not only achieve a nearly 100% floorplanning success rate under fixed-outline constraints with 1% white space but can also obtain better total wirelength than previous works. Besides, the proposed algortihtm has a greater advantage in the runtime over the similar SA-based algorithms.
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