基于硬件加速的实时二值图像连通域标记算法
doi: 10.3724/SP.J.1146.2010.00793
A Hardware Acceleration Based Algorithm for Real-time Binary Image Connected-component Labeling
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摘要: 针对光学成像制导武器系统对图像处理的实时性要求,该文提出了一种基于硬件加速的2次扫描连通域标记算法。算法结合基于像素和基于游程扫描算法的优点,以像素为基本的扫描单元,以线段为基本的标号单元,在第1次扫描过程中建立临时标号的树形拓扑结构,并输出线段作为结果。第2次扫描对线段进行标号替换完成连通域标记。通过在FPGA+DSP平台中进行实验证明,该文算法的硬件加速实现占用资源少,能够达到较高的性能和执行效率,保证了系统的实时性,具有较高的实用价值。Abstract: Due to the requirement for real-time image processing in optical imaging homing weapon systems, this paper proposes a hardware acceleration based connected-component labeling algorithm, which is a real time and two-pass algorithm. The algorithm integrates the merit of pixel-based and the run-based algorithm, which sets pixel as scan unit and line as label unit. Tree-shape topology is constructed in the first scan process, and lines are exported as the results. Then the labels are replaced in the second scan process to complete the connected-component labeling. Experiments on DSP+FPGA platform demonstrate that the hardware acceleration implementation of algorithm reaches a higher performance and efficiency with less resources consumption, and meet the demand of real-time processing.
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Key words:
- Image processing /
- Connected-component /
- Real-time /
- Three-layer tree /
- Hardware acceleration
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