微型SAR的数字下变频设计

王虹现; 李刚; 邢孟道; 张守宏

doi:10.3724/SP.J.1146.2008.01770

微型SAR的数字下变频设计

doi: 10.3724/SP.J.1146.2008.01770

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出版历程
- 收稿日期: 2008-12-24
- 修回日期: 2009-11-10
- 刊出日期: 2010-02-19

Design of Digital Down Converter of Mini SAR

摘要

摘要: 在微型SAR实时成像样机的设计中，对雷达回波在中频进行采样，然后采用数字下变频技术实现正交解调，可以减少系统的复杂性，提高雷达的数字化程度和性能。该文针对微型SAR方案中数字下变频设计中的难点，即采样频率高达2 Gsps，带宽900 MHz，实时处理的难度很大，根据具体设计参数优化了数字下变频的实现结构，重点比较了并行FIR滤波器和快行FIR滤波器的差别，然后在FPGA中编程实现了数字下变频模块，给出资源占用情况、运行速度和量化噪声影响，最后给出在微型SAR技术项目中的实际应用结果，理想的成像结果表明了该设计的正确性。
- 合成孔径雷达(SAR); 数字下变频(DDC); 模数转换(AD); FPGA
Abstract: In the designation of the real-time imaging machine of Mini SAR, the radar return signal is sampled in the intermediate frequency, then Digital Down Converter(DDC) is used to realize quadrature demodulate, which can reduce system complexity and improve radars performance. The difficulty in the design of the DDC of Mini SAR is firstly given in this paper, i.e. the sampling frequency is as high as 2Gsps and the bandwidth is 900MHz, which leads large difficulty in real-time processing. The optimal architecture of DDC based on real design parameters is given in the next, with the emphasis on the difference of the parallel FIR filter and fast FIR filter. Then the implementation of the DDC module using parallel processing with optimized structure in FPGA is given, the resource usage, running speed and quantity noise influence are given. Finally, the result of Mini SAR is given, which confirms the validity of the design.

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