数字式噪声发生器的系统设计和幅度平坦度优化
doi: 10.3724/SP.J.1146.2006.01754
The Design of Digital Noise Generator and Its Amplitude Flatness Optimization Method
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摘要: 该文在高速FPGA(Field Programmable Gate Array)芯片上实现了m序列和FIR(Finite Impulsive Response)滤波算法产生幅度和带宽可控的带限白噪声,提出了一种反sinc平方函数FIR数字滤波器构建方法来补偿噪声在带内的幅度下降,极大地改善了带内幅度平坦度;另外该文还分析了该种噪声产生方法的最大带宽、带内功率平坦度和带外杂散幅度位置之间的关系以及折中设计的方法。设计结果和实际测量结果进行了对比,证明了文中方法的正确性和有效性。
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关键词:
- 白噪声; 幅度补偿; m序列
Abstract: This paper realizes m sequence and FIR algorithm to generate band-limited white noise on a FPGA chip. This noise generator features excellent in-band amplitude flatness and broad bandwidth by means of a novel anti-sinc square function FIR digital filter. The detailed theoretic derivation of this new filter is given and the comparison of its theoretic results with experimental results is also made. The paper then analyzes the relations between maxim bandwidth, in-band amplutude flatness and out-band spurs position of this kind of generator, and gives the corresponding experimental results. The accordance between theoretic and experimental results indicates the validity of the presented method. -
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