TD-SCDMA中基于块判决反馈的联合检测算法及其VLSI实现
doi: 10.3724/SP.J.1146.2006.01377
Block Decision Feedback based Joint Detection Algorithm for TD-SCDMA and Its VLSI Implementation
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摘要: 为了降低TD-SCDMA的终端成本,该文提出了一种基于块判决反馈的联合检测算法。与已有的联合检测算法相比,该算法以微小的性能损失为代价,极大地降低了计算复杂度,从而使得TD-SCDMA的联合检测协处理器面积小、功耗低、实现容易。在该算法的基础上,该文给出了终端联合检测协处理器的VLSI架构。在0.18m的工艺下该协处理器只有16万门。Abstract: A new Joint Detection (JD) algorithm, named as Block-Decision-Feedback based Joint Detection (BDF-JD), is proposed for TD-SCDMA. Comparing to the existing algorithms, BDF-JD has much less computational complexity and comparable performance, and is very suitable for terminals. Based on BDF-JD, the architecture of the JD coprocessor is proposed. Implemented with the 0.18 m process of SMIC, the coprocessor only consumes 160 k gates.
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