高级搜索

留言板

尊敬的读者、作者、审稿人, 关于本刊的投稿、审稿、编辑和出版的任何问题, 您可以本页添加留言。我们将尽快给您答复。谢谢您的支持!

姓名
邮箱
手机号码
标题
留言内容
验证码

应用于航空航天领域的低功耗多节点抗辐射静态随机存取存储器设计

柏娜 李钢 许耀华 王翊

侯志强, 张浪, 余旺盛, 许婉君. 基于快速傅里叶变换的局部分块视觉跟踪算法[J]. 电子与信息学报, 2015, 37(10): 2397-2404. doi: 10.11999/JEIT150183
引用本文: 柏娜, 李钢, 许耀华, 王翊. 应用于航空航天领域的低功耗多节点抗辐射静态随机存取存储器设计[J]. 电子与信息学报. doi: 10.11999/JEIT240294
Hou Zhi-qiang, Zhang Lang, Yu Wang-sheng, Xu Wan-jun. Local Patch Tracking Algorithm Based on Fast Fourier Transform[J]. Journal of Electronics & Information Technology, 2015, 37(10): 2397-2404. doi: 10.11999/JEIT150183
Citation: BAI Na, LI Gang, XU Yaohua, WANG Yi. Low-Power Multi-Node Radiation-Hardened SRAM Design for Aerospace Applications[J]. Journal of Electronics & Information Technology. doi: 10.11999/JEIT240294

应用于航空航天领域的低功耗多节点抗辐射静态随机存取存储器设计

doi: 10.11999/JEIT240294
基金项目: 安徽高校协同创新项目(GXXT-2022-080, GXXT-2023-015)
详细信息
    作者简介:

    柏娜:女,副教授,研究方向为抗辐照集成电路设计

    李钢:男,硕士生,研究方向为抗辐照集成电路设计

    许耀华:男,副教授,研究方向为抗辐照通信集成电路

    王翊:男,讲师,研究方向为抗辐照通信集成电路

    通讯作者:

    王翊 yiwang@ahu.edu.cn

  • 中图分类号: TN402

Low-Power Multi-Node Radiation-Hardened SRAM Design for Aerospace Applications

Funds: The University Synergy Innovation Program of Anhui Province (GXXT-2022-080, GXXT-2023-015)
  • 摘要: 随着对太空的探索的深入,人们发现应用于航天领域的静态随机存取存储器(SRAM)易受到高能粒子轰击发生电节点翻转(SEU)和多节点翻转(SEMNU)。该文为解决SRAM的单粒子翻转问题提出一种16TSRAM单元可以用于SRAM的抗翻转应用,该单元包含3个敏感节点,使用金属氧化物半导体(MOS)管堆叠结构,较大提高了单元的稳定性。在65 nm CMOS工艺下仿真证明该单元可以解决SEU和SEMNU问题。相比于SARP12T, LWS14T, SAR14T, RSP14T, EDP12T, SIS10T, MNRS16T的保持静态噪声容限(HSNM)分别提升了1.4%, 54.9%, 58.9%, 0.7%, 59.1%, 107.4%。相比于SARP12T, RH10T, SAR14T, RSP14T, S8N8P16T, EDP12T, SIS10T, MNRS16T的读取静态噪声容限(RSNM)分别提升了94.3%, 31.4%, 90.3%, 8.9%, 71.5%, 90.4%, 90.3%。相较于SAR14T, RSP14T, EDP12T, RH12T, MNRS16T的保持功率(Hpwr)降低了12.4%, 16.9%, 13.1%, 50.1%。
  • 图  1  MNRS16T单元

    图  2  基本操作

    图  3  MNRS16T各敏感节点受不同程度SEU和SEMNU仿真

    图  4  读取访问时间与写入访问时间比较

    图  5  保持静态噪声容限的比较

    图  6  读取静态噪声容限的比较

    图  7  MNRS16T的SEU和SEMNU蒙特卡洛仿真

    图  8  保持功率比较

    图  9  EQM综合比较

    表  1  SRAM面积比较

    SRAM单元 相对面积
    SARP12T 0.61
    LWS14T 0.82
    SAR14T 0.74
    RSP14T 0.77
    EDP12T 0.72
    SIS10T 0.58
    MNRS16T 1.00
    下载: 导出CSV

    表  2  SRAM各项参数比较

    SRAM单元 RAT(ps) WAT(ps) Hpwr(pw) HSNM(V) RSNM(V)
    SARP12T 33 38 102 0.435 9 0.132 9
    LWS14T 25 10 140 0.285 5 0.278 3
    SAR14T 28 9 223 0.278 3 0.135 7
    RSP14T 40 13 254 0.439 1 0.237 2
    EDP12T 56 10 226 0.278 3 0.135 7
    MNRS16T 23 8 168 0.442 4 0.258 3
    SIS10T 55 11 163 0.213 3 0.135 6
    下载: 导出CSV
  • [1] SUDHIR KUMAR K, KEERTHI PRIYA B, VINEELA M, et al. A design of low power full seu tolerance RHBD 10t SRAM cell[C]. 2020 IEEE India Council International Subsections Conference, Visakhapatnam, India, 2020: 27–32. doi: 10.1109/INDISCON50162.2020.00018.
    [2] SU Zexin, LI Bo, SU Xiaohui, et al. An SEU (single-event upset) mitigation strategy on read-write separation SRAM cell for low power consumption[C]. The 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology, Kunming, China, 2020: 1–3. doi: 10.1109/ICSICT49897.2020.9278325.
    [3] AHMED S, AMBULKAR J, MONDAL D, et al. Soft error immune with enhanced critical charge SIC14T SRAM cell for avionics applications[C]. The 2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration, Dubai, United Arab Emirates, 2023: 1–6. doi: 10.1109/VLSI-SoC57769.2023.10321888.
    [4] NAGA RAGHURAM C H, GUPTA B, KAUSHAL G, et al. Single-event multiple effect tolerant RHBD14T SRAM cell design for space applications[J]. IEEE Transactions on Device and Materials Reliability, 2021, 21(1): 48–56. doi: 10.1109/TDMR.2021.3049215.
    [5] MOHD SAKIB ANSARI S, KAVITHA S, RENIWAL B S, et al. Design of radiation hardened 12T SRAM with enhanced reliability and read/write latency for space application[C]. The 2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, Hyderabad, India, 2023: 104–108. doi: 10.1109/VLSID57277.2023.00034.
    [6] PRASAD G, MANDI B C, ALI M, et al. Soft-error-aware SRAM for terrestrial applications[J]. IEEE Transactions on Device and Materials Reliability, 2021, 21(4): 658–660. doi: 10.1109/TDMR.2021.3118715.
    [7] PAL S, MOHAPATRA S, KI W H, et al. Soft-error-aware read-decoupled SRAM with multi-node recovery for aerospace applications[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(10): 3336–3340. doi: 10.1109/TCSII.2021.3073947.
    [8] PAL S, KI W H, and TSUI C Y. Soft-error-aware read-stability-enhanced low-power 12T SRAM with multi-node upset recoverability for aerospace applications[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 69(4): 1560–1570. doi: 10.1109/TCSI.2022.3147675.
    [9] PAL S, CHOWDARY G, KI W H, et al. Energy-efficient dual-node-upset-recoverable 12T SRAM for low-power aerospace applications[J]. IEEE Access, 2023, 11: 20184–20195. doi: 10.1109/ACCESS.2022.3161147.
    [10] PAL S, SAHAY S, KI W H, et al. A 10T soft-error-immune SRAM with multi-node upset recovery for low-power space applications[J]. IEEE Transactions on Device and Materials Reliability, 2022, 22(1): 85–88. doi: 10.1109/TDMR.2022.3147864.
    [11] BAI Na, XIAO Xin, XU Yaohua, et al. Soft-error-aware SRAM with multinode upset tolerance for aerospace applications[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024, 32(1): 128–136. doi: 10.1109/TVLSI.2023.3328717.
    [12] 张景波, 杨志平, 彭春雨, 等. PMOS晶体管工艺参数变化对SRAM单元翻转恢复效应影响的研究[J]. 电子与信息学报, 2017, 39(11): 2755–2762. doi: 10.11999/JEIT170547.

    ZHANG Jingbo, YANG Zhiping, PENG Chunyu, et al. Study on the effect of upset and recovery for SRAM under the varying parameters of PMOS transistor[J]. Journal of Electronics & Information Technology, 2017, 39(11): 2755–2762. doi: 10.11999/JEIT170547.
    [13] ZHAO Qiang, PENG Chunyu, CHEN Junning, et al. Novel write-enhanced and highly reliable RHPD-12T SRAM cells for space applications[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2020, 28(3): 848–852. doi: 10.1109/TVLSI.2019.2955865.
    [14] PENG Chunyu, YANG Zhou, LIN Zhiting, et al. Reverse bias current eliminated, read-separated, and write-enhanced tunnel FET SRAM[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(1): 466–470. doi: 10.1109/TCSII.2020.3011950.
    [15] PAL S, MOHAPATRA S, KI W H, et al. Soft-error-immune read-stability-improved SRAM for multi-node upset tolerance in space applications[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2021, 68(8): 3317–3327. doi: 10.1109/TCSI.2021.3085516.
    [16] LI Tianwen, YANG Haigang, CAI Gang, et al. A CMOS triple inter-locked latch for SEU insensitivity design[J]. IEEE Transactions on Nuclear Science, 2014, 61(6): 3265–3273. doi: 10.1109/TNS.2014.2366999.
    [17] LI Tianwen, YANG Haigang, ZHAO He, et al. Investigation into SEU effects and hardening strategies in SRAM based FPGA[C]. The 2017 17th European Conference on Radiation and Its Effects on Components and Systems, Geneva, Switzerland, 2017: 1–5. doi: 10.1109/RADECS.2017.8696177.
    [18] 赵磊, 王祖林, 郭旭静, 等. 一种SRAM型FPGA抗软错误物理设计方法[J]. 电子与信息学报, 2013, 35(4): 994–1000. doi: 10.3724/SP.J.1146.2012.01030.

    ZHAO Lei, WANG Zulin, GUO Xujing, et al. A physical design approach for mitigating soft errors in SRAM-based FPGAs[J]. Journal of Electronics & Information Technology, 2013, 35(4): 994–1000. doi: 10.3724/SP.J.1146.2012.01030.
  • 期刊类型引用(5)

    1. 蒲磊,冯新喜,侯志强,余旺盛. 基于空间可靠性约束的鲁棒视觉跟踪算法. 电子与信息学报. 2019(07): 1650-1657 . 本站查看
    2. 孙彦景,石韫开,云霄,朱绪冉,王赛楠. 基于多层卷积特征的自适应决策融合目标跟踪算法. 电子与信息学报. 2019(10): 2464-2470 . 本站查看
    3. 卢钢,彭力. 基于置信值重构的视觉目标跟踪算法. 南京理工大学学报. 2018(02): 210-216 . 百度学术
    4. 孙彦景,王赛楠,石韫开,云霄,施文娟. 基于全局背景与特征降维的视觉跟踪算法. 电子与信息学报. 2018(09): 2135-2142 . 本站查看
    5. 张园强,毕笃彦,查宇飞,库涛,刘新生. 一种利用最大间隔相关滤波的鲁棒目标跟踪算法. 空军工程大学学报(自然科学版). 2017(02): 67-73 . 百度学术

    其他类型引用(5)

  • 加载中
图(9) / 表(2)
计量
  • 文章访问数:  98
  • HTML全文浏览量:  53
  • PDF下载量:  21
  • 被引次数: 10
出版历程
  • 收稿日期:  2024-04-17
  • 修回日期:  2025-02-16
  • 网络出版日期:  2025-02-25

目录

    /

    返回文章
    返回