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面向数字信号处理领域的近似计算技术应用与研究进展

王旭 陈珂 闫成刚 王成华 刘伟强

王旭, 陈珂, 闫成刚, 王成华, 刘伟强. 面向数字信号处理领域的近似计算技术应用与研究进展[J]. 电子与信息学报, 2024, 46(5): 1843-1852. doi: 10.11999/JEIT231245
引用本文: 王旭, 陈珂, 闫成刚, 王成华, 刘伟强. 面向数字信号处理领域的近似计算技术应用与研究进展[J]. 电子与信息学报, 2024, 46(5): 1843-1852. doi: 10.11999/JEIT231245
WANG Xu, CHEN Ke, YAN Chenggang, WANG Chenghua, LIU Weiqiang. Progress in The Application and Research of Approximate Computation Techniques Oriented to The Field of Digital Signal Processing[J]. Journal of Electronics & Information Technology, 2024, 46(5): 1843-1852. doi: 10.11999/JEIT231245
Citation: WANG Xu, CHEN Ke, YAN Chenggang, WANG Chenghua, LIU Weiqiang. Progress in The Application and Research of Approximate Computation Techniques Oriented to The Field of Digital Signal Processing[J]. Journal of Electronics & Information Technology, 2024, 46(5): 1843-1852. doi: 10.11999/JEIT231245

面向数字信号处理领域的近似计算技术应用与研究进展

doi: 10.11999/JEIT231245
基金项目: 国家重点研发计划青年科学家项目(2022YFB4500200),国家自然科学基金(62101252, 62022041)
详细信息
    作者简介:

    王旭:女,博士生,研究方向为近似计算

    陈珂:男,副研究员,研究方向为近似计算电路设计

    闫成刚:男,副研究员,研究方向为混合信号集成电路设计

    王成华:男,教授,研究方向为集成电路设计、验证与测试

    刘伟强:男,教授,研究方向为高能效高安全性新兴计算集成电路与系统

    通讯作者:

    刘伟强 liuweiqiang@nuaa.edu.cn

  • 中图分类号: TN402; TP183

Progress in The Application and Research of Approximate Computation Techniques Oriented to The Field of Digital Signal Processing

Funds: The National Key Research and Development Program of China (2022YFB4500200), The National Natural Science Foundation of China (62101252, 62022041)
  • 摘要: 在信号处理领域,近似计算技术备受关注。复杂算法和海量数据限制了应用的处理速度且增加了系统硬件消耗。由于信号具有冗余性,精确结果并非必需,满足用户可接受的结果已足够。因此,采用近似计算技术可以有效减少计算量,提高计算效率和系统性能。该文以近似计算技术的不同设计层次为切入,首先介绍了信号处理应用的特点,综述了近年来近似计算技术在算法和电路层面的研究进展,并调研了通信、视频图像以及雷达等信号处理方向的近似计算技术方案。最后,对该领域的发展方向进行了讨论和展望,为推动近似计算技术在信号处理领域的应用提供了思路。
  • 图  1  近似计算技术及其应用

    表  1  加法器近似技术

    近似方法相关工作概述
    非分段推测近似文献[6]通过缩短进位链来获得更快速和更高性能的加法器。
    分段推测近似文献[79]
    晶体管级近似文献[1012]通过减少晶体管和基本门的数量,显著降低功耗。
    下载: 导出CSV

    表  2  定点乘法器近似技术

    近似方法相关工作概述
    操作数近似文献[14]通过将二进制乘法转换为对数域的加法,具有极低的功耗。
    阵列近似文献[15]通过对部分积矩阵的一部分低有效位直接舍去,以达到调整输出位宽和降低乘法器功耗面积的目的。
    部分积近似文献[1618]利用卡诺图对Booth编码结果进行优化,从而精简 Booth 算法的部分积表达式。
    压缩器近似文献[1921]通过切断压缩器同级之间进位链使得乘法器在功耗、延迟和晶体管数量方面都实现了显著降低。
    下载: 导出CSV

    表  3  除法器近似技术

    近似方法相关工作概述
    阵列近似文献[26, 27]对传统阵列结构中的减法器进行近似设计,降低除法器阵列的复杂度。
    操作数近似文献[28, 29]对操作数进行截断,或者从首位 1 开始截断,在较小精度损失下大大减小了运算延时和能量。
    阵列和操作数混合近似文献[30]利用卡诺图对 Booth编码结果进行优化,从而精简 Booth 算法的部分积表达式。
    下载: 导出CSV

    表  4  乘法累加器近似技术

    近似方法相关工作概述
    乘法器近似文献[31, 32]通过将乘法操作数进行分段并设计近似 MAC。
    加法器近似文献[33, 34]通过将近似加法器运用到有符号 MAC 单元的最后一步进位传播加法器中,
    同时使用 VOS 调节输入电压,最终实现功耗降低。
    乘法加法阵列合并近似文献[3537]通过将累加插入到乘法部分积阵列中,设计近似MAC 单元。
    下载: 导出CSV
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出版历程
  • 收稿日期:  2023-11-09
  • 修回日期:  2024-03-29
  • 网络出版日期:  2024-05-07
  • 刊出日期:  2024-05-10

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