应用于极致边缘计算场景的卷积神经网络加速器架构设计

吴瑞东; 刘冰; 付平; 纪兴龙; 鲁文帅

doi:10.11999/JEIT220130

应用于极致边缘计算场景的卷积神经网络加速器架构设计

doi: 10.11999/JEIT220130

1.
哈尔滨工业大学电子与信息工程学院哈尔滨 150000
2.
启元实验室北京 100089

基金项目: 国家自然科学基金(62171156)

详细信息

作者简介:
吴瑞东：男，博士生，研究方向为高性能异构计算

刘冰：男，副教授，研究方向为高性能计算、计算视觉

付平：男，教授，研究方向为自动测试

纪兴龙：男，研究员，研究方向为嵌入式智能计算

鲁文帅：男，研究员，研究方向为智能微系统

通讯作者:
刘冰　liubing66@hit.edu.cn

中图分类号: TN929.5; TP331
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- 被引次数: 0
出版历程
- 收稿日期: 2022-02-15
- 修回日期: 2022-07-10
- 网络出版日期: 2022-07-15
- 刊出日期: 2023-06-10

Convolutional Neural Network Accelerator Architecture Design for Ultimate Edge Computing Scenario

1.
School of Electronics and Information Engineering, Harbin Institute of Technology, Harbin 150000, China
2.
Qiyuan Laboratory, Beijing 100089, China

Funds: The National Natural Science Foundation of China (62171156)

摘要

摘要: 针对卷积神经网络在极致边缘计算(UEC)场景应用中的性能和功耗需求，该文针对场景中16 Bit量化位宽的网络模型提出一种不依赖外部存储的卷积神经网络(CNN)加速器架构，该架构基本结构设计为基于现场可编程逻辑门阵列( FPGA)的多核CNN全流水加速器。在此基础上，实现了该加速器的层内映射与层间融合优化。然后，通过构建资源评估模型在理论上完成架构中的计算资源与存储资源评估，并在该理论模型指导下，通过设计空间探索来最大化资源使用率与计算效率，进而充分挖掘加速器在计算资源约束条件下的峰值算力。最后，以纳型无人机(UAV)自主快速人体检测UEC场景为例，通过实验完成了加速器架构性能验证与分析。结果表明，在实现基于单步多框目标检测(SSD)的人体检测神经网络推理中，加速器在100 MHz和25 MHz主频下分别实现了帧率为137和34的推理速度，对应功耗分别为0.514 W和0.263 W，满足纳型无人机自主计算这种典型UEC场景对图像实时处理的性能与功耗需求。
- 极致边缘计算 /
- 卷积神经网络 /
- 现场可编程逻辑门阵列 /
- 加速器架构
Abstract: In order to meet the requirements of performance and power in Ultimate Edge Computing (UEC) scenario, a Convolutional Neural Network (CNN) accelerator architecture is proposed with 16 Bit quantization model that does not rely on external memory. The basic structure of proposed architecture is Field Programmable Gate Array (FPGA) with multi-core CNN full pipeline accelerator. On this basis, the optimization of intra-layer mapping and inter-layer fusion of accelerator is realized. Then, the evaluation of computing resource and memory resource are theoretically completed by building the corresponding model. Under the guidance of this model, the resource utilization and computing efficiency are maximized through design space exploration, and the peak computing power of accelerator is fully exploited with limited resource constraint. Finally, taking fast human detection of nano Unmanned Aerial Vehicle (UAV) as an example, the verification and analysis of architecture are completed through experiments. Experimental results show that in the inference of human body detection neural network based on Single Shot multibox Detector (SSD), the performance is achieved with the speed of frame rate 137 and 34 at 100 MHz and 25 MHz, and the corresponding power is 0.514 W and 0.263 W, respectively, which meets the performance and power requirements of real-time image processing in typical UEC scenarios such as autonomous computing of nano-UAV.
- Ultimate Edge Computing(UEC) /
- Convolutional Neural Network(CNN) /
- Field Programmable Gate Array (FPGA) /
- Accelerator architecture

HTML全文

图 1 纳型无人机结构图

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图 2 计算系统硬件框图

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图 3 FPGA功能模块框图

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图 4 通用加速器示意图

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图 5 卷积流水计算示意图

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图 6 层内映射示意图

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图 7 层间融合优化示意图

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图 8 多核 CNN 加速示意图

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表 1 网络结构参数与并行度探索结果

网络层	输入大小	卷积核大小	T_M	T_N	周期
0	160×120×1	3×3×1×32	1	8	691200
1	160×120×32	1×1×32×32	32	1	614400
2	160×120×32	3×3×32	1	8	691200
3	160×120×32	1×1×32×32	32	1	614400
4	80×60×32	3×3×32×16	32	1	691200
5	80×60×16	1×1×16×16	2	1	614400
6	80×60×16	3×3×16	1	1	691200
7	80×60×16	1×1×16×16	2	1	614400
8	40×30×16	3×3×16×16	4	1	691200
9	40×30×16	1×1×16×16	1	1	307200
10	40×30×16	3×3×16	1	1	172800
11	40×30×16	1×1×16×16	1	1	307200
SSD0	40×30×16	–	–	–	–
12	20×15×16	3×3×16×16	1	1	691200
13	20×15×16	1×1×16×16	1	1	196800
14	20×15×16	3×3×16
15	20×15×16	1×1×16×16
SSD1	20×15×16	–	–	–	–
16	10×7×16	3×3×16×16	1	1	207200
17	10×7×16	1×1×16×16
18	10×7×16	3×3×16
19	10×7×16	1×1×16×16
SSD2	10×7×16	–	–	–	–

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表 2 加速器资源消耗理论值(个)

网络层	加速器	DSP	BRAM36K
0	PE0	8	0.5
1	PE1	32	8
2	PE2	8	12
3	PE3	32	8
4	PE4	32	8
5	PE5	2	1.5
6	PE6	1	3
7	PE7	2	1.5
8	PE8	4	2
9	PE9	1	1
10	PE10	1	1.5
11	PE11	1	1
12	PE12	1	2.5
13～15	X0	1	10.5
16～19	X1	1	6
总计	15	127	67

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表 3 部署资源消耗

资源类别	消耗(个)	片内总计(个)	占比(%)
LUT	24814	63400	39.14
LUTRAM	1236	19000	6.51
FF	17516	126800	13.81
BRAM36K	106	135	78.52
DSP	156	240	65.00
IO	17	210	8.10

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表 4 SSD资源消耗(个)

	DSP	BRAM36K
SSD0	18	9
SSD1	6	6
SSD2	4	6
总计	28	21

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表 5 不同频率下功耗结果(W)

类别	100 MHz 功耗	25 MHz功耗
Clock	0.062	0.016
Logic	0.073	0.019
Signal	0.098	0.022
BRAM	0.040	0.010
DSP	0.050	0.012
IO	<0.001	<0.001
Static	0.109	0.109
评估值	0.432	0.188
测量值	0.514	0.263

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表 6 软硬件处理性能对比结果(ms)

	ARM计算时间 1.2 GHz	FPGA加速时间 100 MHz
PE0～PE12	140.424	9.291
PE0～X1	141.179	13.280
SSD0	2.782	1.117
SSD1	1.952	0.939
SSD2	0.364	0.233
输入间隔	146.277	7.287
帧率	7 FPS	137 FPS

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表 7 不同平台性能对比结果

类别	ARM	GAP8	FPGA
类别	1.2 GHz	200 MHz	25 MHz	100 MHz
每秒操作数	1.101	0.482	5.528	22.111
推理时间(ms)	146.277	334.625	29.148	7.287
功耗(W)	2.617	0.196	0.263	0.514
每瓦操作数	0.421	2.459	21.019	43.018

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表 8 与相关工作比较结果

类别	文献[20]	文献[20]	文献[22]	文献[23]	本文
平台	GX1150	GX1150	10AS066N	XC7Z045	XC7A100T
网络类型	卷积	深度分离卷积	MobileNetV2	Face Detector	Body Detection
量化位宽(bit)	16	16	16	16	16
DSP	760	712	1278	–	128
频率(MHz)	150	180	133	150	25	100
算力(GOPS)	87.500	98.910	170.600	137	5.528	22.111
功耗(W)	8.69	8.52	–	9.63	0.263	0.514
计算效率	0.768	0.772	1.004	–	1.728	1.727
每瓦操作数	10.069	11.609	–	14.226	21.019	43.018

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