A Novel Logic-obfuscation Method to Resist Netlist-reverse Attack Based on Genetic Algorithm
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摘要: 随着集成电路(IC)产业进入后摩尔时代,芯片一次性工程成本愈发高昂,而以逆向工程技术为代表的知识产权窃取手段,越来越严重地威胁着芯片信息安全。为了抵抗逆向工程攻击,该文提出一种基于遗传算法的自动化逻辑混淆方法,通过分析网表寄存器的拓扑网络结构,筛选逻辑节点并创建冗余连接,从而混淆词级寄存器的相似性特征,在低开销下防止逆向攻击恢复寄存器传输级的词级变量、控制逻辑与数据通路。基于SM4国密算法基准电路开展验证实验,结果表明:经该文方法混淆后,逆向结果与设计真实情况的标准化互信息相关度下降了46%,拓扑复杂度提升61.46倍,面积额外开销为0.216%;同时相较于随机混淆,该混淆方法效率提升为2.718倍,面积额外开销降低70.8%。Abstract: As the Integrated Circuit (IC) industry enters the post-Moore era, the cost of one-time chip design is getting higher and higher, and threats of reverse engineering to recover the original design increase continually. In order to resist the reverse attacks, an automatic logic obfuscation technology based on genetic algorithm is proposed. By analyzing the topology network of registers in netlist, fan-in and fan-out nets are chosen to create redundant connections between registers, so that obfuscating the similarity among the word-level registers, and at last resist the reverse attacks to recover the word-level variable, control logic and dataflow. Experiments on the SM4 circuit shows, compared to the original netlist, after the proposed method’s obfuscation, the standardized mutual information of reverse attack result is reduced by 46%, and the topology complexity increased by 61.46 times. And compared to random obfuscation, the efficiency of the proposed method is increased to 2.718 times, and the area cost is reduced by 70.8%.
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Key words:
- Post-Moore era /
- Hardware security /
- Logic obfuscation /
- Reverse engineering /
- Genetic algorithm
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表 1 面积开销对比
1 2 3 4 5 6 7 8 9 NMI值 0.95 0.9 0.85 0.8 0.75 0.7 0.65 0.6 0.55 本文混淆方法开销 13 28 47 70 116 139 169 190 269 随机混淆方法开销 5 35 75 135 228 268 579 – – 本文方法降低面积开销(%) – 20.00↓ 37.33↓ 48.15↓ 49.12↓ 48.13↓ 70.80↓ – – -
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