Low-cost PUF Circuit Based on Sub-threshold Current Array
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摘要: 物理不可克隆函数(PUF)能够提取出集成电路在加工过程中的工艺误差并将其转化为安全认证的密钥。由于常用于资源及功耗都受限的场合，实用化的PUF电路需要极高的硬件利用效率及较强的抗攻击性能。该文提出一种基于亚阈值电流阵列放电方案的低成本PUF电路设计方案。亚阈值电流阵列的电流具有极高的非线性特点，通过引入栅控开关和交叉耦合的结构，能够显著提升PUF电路的唯一性和稳定性。此外，通过引入亚阈值电流的设计可以极大地提高PUF的安全性，降低传统攻击手段的建模攻击。为了提升芯片的资源利用率，通过详细紧凑的版图设计和优化，该文提出的PUF单元面积仅为377.4 μm2，使得其特别适合物联网等低功耗低成本应用场景。仿真结果表明，该文所提亚阈值电路放电阵列PUF具有良好的唯一性和稳定性，无需校准电路的标准温度电压下唯一性为48.85%；在温度范围–20～80°C，电压变动范围为0.9～1.3V情况下，其可靠性达到了99.47%。Abstract: The Physical Unclonable Function (PUF) can extract the process error of the integrated circuit during the processing and convert it into a key for security authentication. It is often used in occasions where resources and power consumption are limited, practical PUF circuits require extremely high hardware utilization efficiency and resistant to machine learning attack. A low-cost PUF circuit design scheme based on the sub-threshold current array discharge scheme is proposed. The current of the sub-threshold current array has extremely high non-linear characteristics. By introducing a gate-controlled switch and a cross-coupling structure, the uniqueness and stability of the PUF circuit can be significantly improved. In addition, the design of introducing sub-threshold current can greatly improve the security of PUF and reduce the modeling attacks of traditional attack methods. In order to improve the resource utilization of the chip, the area of the proposed PUF cell is only 377.4 μm2 through a detailed and compact layout design and optimization, making it particularly suitable for low-power and low-cost applications such as IoT. The simulation results show that the PUF of the sub-threshold circuit discharge array proposed in this paper has good uniqueness and stability, and the uniqueness is 48.85% under the standard temperature and voltage without the need to calibrate the circuit. In the temperature range of –20°C to 80°C and the voltage variation range of 0.9 V to 1.3 V, its reliability reaches 99.47%.
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表 2 本文PUF电路与其他PUF结构的性能对比
序号 本文PUF TCAS'I[18] TCAS'I[20] TVLSI[21] 工艺制程(nm) 40 130 40 180 CRPs数量 1.8×1019 3.7×1019 1.8×1019 3.4×1038 PUF单元面积(μm2) 382 44700 4719 5175 动态功率(μW) 37 0.068 3.85 – 消耗能量/bit (pJ/bit) 0.29 11 7.7 – 唯一性 0.4885 0.499 0.4989 0.4995 输出响应速率(Mb/s) 89 0.006 0.5 – 本征不稳定位占比(评估CRPs数量) 8.9%(8000) 9%(500) 4.92%(1000) 8.1%(10000) 不稳定位占比(纠错方案后) 0.84%(TMV) 0.40%(掩蔽42%CRPs) 0.82%(掩蔽18.2%CRPs) 10–9(掩蔽80%CRPs) 温度范围(°C) –20～80 –20～80 –40～90 –40～125 电压范围(V) 0.9～1.3 1.08～1.32 0.9～1.3 1.5～2.1 
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