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基于亚阈值电流阵列的低成本物理不可克隆电路设计

崔益军 张虎 闫成刚 王成华 刘伟强

崔益军, 张虎, 闫成刚, 王成华, 刘伟强. 基于亚阈值电流阵列的低成本物理不可克隆电路设计[J]. 电子与信息学报, 2023, 45(1): 42-48. doi: 10.11999/JEIT211272
引用本文: 崔益军, 张虎, 闫成刚, 王成华, 刘伟强. 基于亚阈值电流阵列的低成本物理不可克隆电路设计[J]. 电子与信息学报, 2023, 45(1): 42-48. doi: 10.11999/JEIT211272
CUI Yijun, ZHANG Hu, YAN Chenggang, WANG Chenghua, LIU Weiqiang. Low-cost PUF Circuit Based on Sub-threshold Current Array[J]. Journal of Electronics & Information Technology, 2023, 45(1): 42-48. doi: 10.11999/JEIT211272
Citation: CUI Yijun, ZHANG Hu, YAN Chenggang, WANG Chenghua, LIU Weiqiang. Low-cost PUF Circuit Based on Sub-threshold Current Array[J]. Journal of Electronics & Information Technology, 2023, 45(1): 42-48. doi: 10.11999/JEIT211272

基于亚阈值电流阵列的低成本物理不可克隆电路设计

doi: 10.11999/JEIT211272
基金项目: 国家自然科学基金(62134002, 62104107),江苏省自然科学基金(BK20210287),中央高校基本科研业务费专项资金(NS2021031)
详细信息
    作者简介:

    崔益军:男,讲师,博士,研究方向为密码芯片技术(物理不可克隆函数技术、后量子密码等)

    张虎:男,硕士生,研究方向为新兴硬件安全方案物理不可克隆函数技术

    闫成刚:男,讲师,博士,研究方向为数模混合集成电路设计、近似通信集成电路设计

    王成华:男,教授,博士生导师,研究方向为信息安全芯片、物理不可克隆函数等

    刘伟强:男,教授,博士生导师,研究方向为信息安全芯片、近似计算芯片、AI硬件加速等

    通讯作者:

    刘伟强 liuweiqiang@nuaa.edu.cn

  • 中图分类号: TN402; TP331

Low-cost PUF Circuit Based on Sub-threshold Current Array

Funds: The National Natural Science Foundation of China (62134002, 62104107), The Natural Science Foundation of Jiangsu Province (BK20210287), The Fundamental Research Funds for the Central Universities (NS2021031)
  • 摘要: 物理不可克隆函数(PUF)能够提取出集成电路在加工过程中的工艺误差并将其转化为安全认证的密钥。由于常用于资源及功耗都受限的场合,实用化的PUF电路需要极高的硬件利用效率及较强的抗攻击性能。该文提出一种基于亚阈值电流阵列放电方案的低成本PUF电路设计方案。亚阈值电流阵列的电流具有极高的非线性特点,通过引入栅控开关和交叉耦合的结构,能够显著提升PUF电路的唯一性和稳定性。此外,通过引入亚阈值电流的设计可以极大地提高PUF的安全性,降低传统攻击手段的建模攻击。为了提升芯片的资源利用率,通过详细紧凑的版图设计和优化,该文提出的PUF单元面积仅为377.4 μm2,使得其特别适合物联网等低功耗低成本应用场景。仿真结果表明,该文所提亚阈值电路放电阵列PUF具有良好的唯一性和稳定性,无需校准电路的标准温度电压下唯一性为48.85%;在温度范围–20~80°C,电压变动范围为0.9~1.3V情况下,其可靠性达到了99.47%。
  • 图  1  亚阈值电路

    图  2  亚阈值电流阵列强PUF单元结构

    图  3  PUF单元生成响应的波形

    图  4  基于亚阈值电流阵列的 PUF 电路整体方案

    图  5  PUF 单元版图设计(上)和 CELL 版图设计(下)

    图  6  PUF的片间汉明距离分布

    图  7  CRPs的数量与不稳定位的关系

    图  8  片内汉明距离分布

    表  1  设计中所用参数

    MP1,
    MP2
    MP3,
    MP4
    MN1,
    MN2
    C1,
    C2
    尺寸/
    规格
    12 μm/
    100 nm
    1.2 μm/
    40 nm
    1.2 μm/
    40 nm
    40 pF
    下载: 导出CSV

    表  2  本文PUF电路与其他PUF结构的性能对比

    序号本文PUFTCAS'I[18]TCAS'I[20]TVLSI[21]
    工艺制程(nm) 40 130 40 180
    CRPs数量 1.8×10193.7×10191.8×10193.4×1038
    PUF单元面积(μm2)38244700 4719 5175
    动态功率(μW)370.0683.85
    消耗能量/bit (pJ/bit)0.29117.7
    唯一性 0.4885 0.499 0.4989 0.4995
    输出响应速率(Mb/s)890.0060.5
    本征不稳定位占比(评估CRPs数量)8.9%(8000)9%(500)4.92%(1000)8.1%(10000)
    不稳定位占比(纠错方案后)0.84%(TMV)0.40%(掩蔽42%CRPs) 0.82%(掩蔽18.2%CRPs) 10–9(掩蔽80%CRPs)
    温度范围(°C) –20~80 –20~80 –40~90 –40~125
    电压范围(V)0.9~1.31.08~1.320.9~1.31.5~2.1
    下载: 导出CSV
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出版历程
  • 收稿日期:  2021-11-16
  • 录用日期:  2022-03-25
  • 修回日期:  2022-03-16
  • 网络出版日期:  2022-04-06
  • 刊出日期:  2023-01-17

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