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130 GHz CMOS有源矢量合成移相器

李旭光 刘兵 傅海鹏 马凯学

李旭光, 刘兵, 傅海鹏, 马凯学. 130 GHz CMOS有源矢量合成移相器[J]. 电子与信息学报, 2021, 43(6): 1559-1564. doi: 10.11999/JEIT210071
引用本文: 李旭光, 刘兵, 傅海鹏, 马凯学. 130 GHz CMOS有源矢量合成移相器[J]. 电子与信息学报, 2021, 43(6): 1559-1564. doi: 10.11999/JEIT210071
Xuguang LI, Bing LIU, Haipeng FU, Kaixue MA. A 130 GHz CMOS Active Vector-Modulation Phase Shifter[J]. Journal of Electronics & Information Technology, 2021, 43(6): 1559-1564. doi: 10.11999/JEIT210071
Citation: Xuguang LI, Bing LIU, Haipeng FU, Kaixue MA. A 130 GHz CMOS Active Vector-Modulation Phase Shifter[J]. Journal of Electronics & Information Technology, 2021, 43(6): 1559-1564. doi: 10.11999/JEIT210071

130 GHz CMOS有源矢量合成移相器

doi: 10.11999/JEIT210071
基金项目: 国家重点研发计划(2018YFB2202500)
详细信息
    作者简介:

    李旭光:男,1990年生,博士生,研究方向为射频、毫米波集成电路设计

    刘兵:男,1991年生,博士生,研究方向为射频、毫米波集成电路设计

    傅海鹏:男,1985年生,副教授,研究方向为射频、毫米波集成电路设计,太赫兹探测器,晶体管可靠性及建模

    马凯学:男,1973年生,教授,研究方向为射频、毫米波集成电路设计

    通讯作者:

    马凯学 makaixue@tju.edu.cn

  • 中图分类号: TN43

A 130 GHz CMOS Active Vector-Modulation Phase Shifter

Funds: The National Key R&D Program of China (2018YFB2202500)
  • 摘要: 面向毫米波相控阵雷达系统应用,该文基于55 nm CMOS工艺设计了一款工作于130 GHz的有源矢量(VM)合成移相器。该电路包含宽带正交发生器、可变增益放大和矢量合成模块。为提升移相器相位分辨率和移相精度,该电路可变增益放大采用了具有高频宽带属性的共栅放大结构和具有高增益属性的含中和电容的共源共栅放大结构多级级联的形式。为避免移相器在矢量合成时由自身结构特点产生相位断裂而导致移相范围下降,该设计电路在矢量合成模块中融入了数控人工介质(DiCAD)结构。通过全波电磁仿真对所设计毫米波移相器进行验证,在125~135 GHz频率范围内,所设计移相器平均增益大于1 dB,移相器可由控制电压控制实现全360°范围内5.625°的相位步进,RMS相位误差小于4°,电路面积为1100 μm×600 μm,功耗33 mW。
  • 图  1  射频移相架构的相控阵雷达接收系统示意图[1]

    图  2  有源矢量合成移相器结构示意图

    图  3  可变增益放大器电路结构

    图  4  矢量合成结构电路图

    图  5  矢量合成结构的相位断裂示意图

    图  6  DiCAD结构及性能

    图  7  D波段有源矢量合成移相器电路版图

    图  8  移相器各状态回波损耗

    图  10  移相器各状态相位和RMS相位误差

    图  9  移相器各状态增益及平均增益

    表  1  移相器性能比较

    序号频率(GHZ)工艺分辨率(°)增益(dB)RMS相位误差(°)功耗(mW)面积(mm2)
    文献[5]57~6465 nm CMOS11.25–16.34.4~9.500.094#
    文献[6]56~6540 nm CMOS2.7–5~–0.41.4381.12
    文献[7]80.2~96.828 nm SOI22.50.83<11.921.60.06#
    文献[8]71.5~84.50.13 μm SiGe5.62571.35~3.5600.82
    文献[9]162~190130 nm SiGe22.5–6.2<89.9~15.30.07#
    本文*125~13555 nm CMOS5.6251~21.4~4.0330.66
    #:核心面积;*:仿真结果。
    下载: 导出CSV
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出版历程
  • 收稿日期:  2021-01-21
  • 修回日期:  2021-04-27
  • 网络出版日期:  2021-05-14
  • 刊出日期:  2021-06-18

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