同步和异步时序电路的统一设计和分析理论
THE UNIFIED THEORY FOR DESIGNING AND ANALYSING BOTH SYNCHRONOUS AND ASYNCHRONOUS SEQUENTIAL CIRCUITS
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摘要: 本文讨论了时钟信号的普遍描述和含时钟信号的触发器次态方程,并在此基础上提出了同步和异步时序电路的统一设计和分析理论。该理论的有效性已由实例予以证明。
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关键词:
- 时序电路; 时钟信号; 逻辑设计
Abstract: The paper discusses general expresses of the clock signal and the next state equations containing the clock signal for flip-flops, and based on it, the unified theory for designing and analysing both synchronous and asynchronous sequential circuits is proposed. The theory is proved effective by practical examples. -
Rhyne V T. Fundamentals of Digital System Design. Englewood Cliffs, New Jersey: Prentice-Hall, Inc., 1973, 267-272.[2]吴训威,李亦宁.杭州大学学报,1983,10(2): 187-189.[3]万栋义.脉冲与数字电路.北京:高等教育出版社,1986,361-371.[4]陈偕雄,吴训威.杭州大学学报,1987,14(3): 301-312.[5]方振贤.电子学报,1990,18(5): 91-96.[6]吴训威,陈偕雄.Comparison Logic and Its Application in Digital Circuits. Proc. Int. Conf. on[7]CAS. Beijing: 1985, 440-443. -
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