嵌入式协处理器初等函数的快速统一实现
The Unified Fast Implementation of Elementary Functions in the Embeded Coprocessor
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摘要: 该文通过迭代次序的改进和有理近似的引入,提出了改进的CORDIC钟法。根据改进的CORDIC算法,实现了初等函数的快速统一运算,采用VerilogHDL完成了16位数值协处理器IP核的设计。该IP核具有规模较小、高速和控制简单的特点,非常适合嵌入式应用。Abstract: In this paper, the unified CORDIC algorithm is put forward by the improvement of iterative sequence and the presence of rational approximation. The unified algorithm of elementary functions is implemented with high speed. A coprocessor core using the improved algorithm is built by Verilog HDL. The core is very suitable for embedded application due to its small scale, high speed and simple control.
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