Advanced Search
Volume 24 Issue 4
Apr.  2002
Turn off MathJax
Article Contents
Liu Jian, Li Hua, Wang Chengning, Yu Sile. Design and implementation of system control for the HDTV video decoder[J]. Journal of Electronics & Information Technology, 2002, 24(4): 573-576.
Citation: Liu Jian, Li Hua, Wang Chengning, Yu Sile. Design and implementation of system control for the HDTV video decoder[J]. Journal of Electronics & Information Technology, 2002, 24(4): 573-576.

Design and implementation of system control for the HDTV video decoder

  • Received Date: 2000-04-28
  • Rev Recd Date: 2000-12-04
  • Publish Date: 2002-04-19
  • This paper presents the design and implementation of system control for HDTV video decoder. The principle of the system control is described in detail too. FPGA is adopted for its programmable and reconfigurable features. The system control works perfectly and steadily which ensures the perfect work of decoder and display buffer.
  • loading
  • ISO/IEC 13818-1 Generic Coding of Moving Pictures and Associated Audio Information: System,Jan. 20, 1995. [2]SO/IEC 13818-2 Generic Coding of Moving Pictures and Associated Audio Information: Video,Jan. 20, 1995. [3]ATSC: ATSC Digital Television Standard, Oct. 4, 1995.[2]ATSC: Guide to the Use of the ATSC Digital Television Standard, Oct. 4, 1995.[3]K. Kawahara, H. Yamauchi, S. Okada, A single chip MPEG1 decoder, IEEE Trans. on Consumer Electronics, 1995, 41(3), 707-715.[4]Aldo Cugnini, Richard Shen, MPEG-2 video decoder for the digital HDTV grand allance system,IEEE Trans. on Consumer Electronics, 1995, 41(3), 748-752.
  • 加载中

Catalog

    通讯作者: 陈斌, bchen63@163.com
    • 1. 

      沈阳化工大学材料科学与工程学院 沈阳 110142

    1. 本站搜索
    2. 百度学术搜索
    3. 万方数据库搜索
    4. CNKI搜索

    Article Metrics

    Article views (2109) PDF downloads(567) Cited by()
    Proportional views
    Related

    /

    DownLoad:  Full-Size Img  PowerPoint
    Return
    Return