Chen Xiexiong, Shen Jizhong. THE LOGIC SYNTHESIS OF MULTIVALUED SYMMETRIC FUNCTION BASED ON BINARY FULL-ADDER[J]. Journal of Electronics & Information Technology, 1996, 18(5): 532-536.
Citation:
Chen Xiexiong, Shen Jizhong. THE LOGIC SYNTHESIS OF MULTIVALUED SYMMETRIC FUNCTION BASED ON BINARY FULL-ADDER[J]. Journal of Electronics & Information Technology, 1996, 18(5): 532-536.
Chen Xiexiong, Shen Jizhong. THE LOGIC SYNTHESIS OF MULTIVALUED SYMMETRIC FUNCTION BASED ON BINARY FULL-ADDER[J]. Journal of Electronics & Information Technology, 1996, 18(5): 532-536.
Citation:
Chen Xiexiong, Shen Jizhong. THE LOGIC SYNTHESIS OF MULTIVALUED SYMMETRIC FUNCTION BASED ON BINARY FULL-ADDER[J]. Journal of Electronics & Information Technology, 1996, 18(5): 532-536.
This paper discusses the definition and properties of multivalued symmetric functions, and points out that a multivalued symmetric function can be decomposed according to the value of the function j. The subfunction L j corresponding to j will certainly be a symmetric function, and it may be expressed as the sum-of-products form of degenerated multivalued fundamental symmetric functions. Based on this consideration, the logic synthesis circuit realization for the multivalued symmetric functions based upon full-adders is proposed.
Chen X(陈偕雄).The Radio and Electronic Engineer, 1983, 53(2): 67-74.[2]Tapia Ma. Int[J].J. Electronics.1989, 67(5):703-715[3]Butler J T, Schueller K A. Worst case number of terms in symmetric multivalued functions, IEEE proc. 21th ISMVL, Victoria: 1991, 94-101.[4]陈偕雄.科技通报,1990, 6(1):1-5.[5]赵小杰,陈偕雄.杭州大学学报,1990, 17(4):401-408.
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