He Feiyun, Wen Maosheng, Cai Yuanlong. AN ANALYSIS OF BLOCKING IN MULTISTAGE INTERCONNECTION NETWORKS SERVING MULTIRATE TRAFFICS[J]. Journal of Electronics & Information Technology, 1997, 19(1): 31-36.
Citation:
He Feiyun, Wen Maosheng, Cai Yuanlong. AN ANALYSIS OF BLOCKING IN MULTISTAGE INTERCONNECTION NETWORKS SERVING MULTIRATE TRAFFICS[J]. Journal of Electronics & Information Technology, 1997, 19(1): 31-36.
He Feiyun, Wen Maosheng, Cai Yuanlong. AN ANALYSIS OF BLOCKING IN MULTISTAGE INTERCONNECTION NETWORKS SERVING MULTIRATE TRAFFICS[J]. Journal of Electronics & Information Technology, 1997, 19(1): 31-36.
Citation:
He Feiyun, Wen Maosheng, Cai Yuanlong. AN ANALYSIS OF BLOCKING IN MULTISTAGE INTERCONNECTION NETWORKS SERVING MULTIRATE TRAFFICS[J]. Journal of Electronics & Information Technology, 1997, 19(1): 31-36.
The paper proposes an estimation method of blocking in multistage interconnection networks serving multirate traffics. It can be used in multirate curcuit swithcing and ATM switching systems. In the paper, an analysis of blocking is given. The accuracy of the model is tested by simulation and some factors which influance the blocking are commpared. The study shows that the modular size and service bandwidth play an important role in the blocking behavior. Compared with non-blocking design, blocking design can reduce the complexity of harhware considerablly.
Pipenger N. On crossbar switching networks. IEEE Tans. on Commun.,1975,COM-23(6):646-659.[2]Lee C. Analysis of switching networks. Bell system Tech. J., 1955, 34(11): 1287-1315.[3]Melen R, Turner J S. Nonblocking networks for fast packet switching, in Proc. of IEEE INFOCOM, Ottawa, Canada: 1989, 548-557.[4]Fitzpatrick G J, et al. Analysis of large-scale three-stage networks serving multirate traffic,teletraffic[5]and datatraffic in a period of change, ITC-13, Denmark: 1991, 905-910.[6]Kaufman J S. Blocking in a shared resource environment. IEEE Trans. on Commun.,1981,COM-29(10):1474-1481.[7]Sakurai Y, et al. Large-scale ATM multistage switching network with shared buffer memory switches.[8]IEEE Commun.Mag.,1991,29(1):90-96.