Design of parallel A/D converter based on threshold-controllable technique

赵保经等编著,A/D和D/A转换器应用手册,上海,上海科学普及出版社,1995,第二章.[2]P.E. Allen, D. R. Holberg. CMOS Analog Circuit Design, New York, Holt, Rinehart and winston,1987, Chap. 10. ［3］Y.T. Wang, B. Razavi. An 8-bit 150-MHz CMOS A/D converter, IEEE J. of Solid-State Circuits,2000, 35(3), 308-317.[3]Y. Geerts, A. M. Marques, M. S. J. Steyaert, et al., A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications, IEEE J. of Solid-State Circuits, 1999, 34(7).927-936.[4]吴训戚,章专,ECL集成电路的四值接口技术,电子科学学刊,1991,13(5),456-460[5]杭国强,吴训威,采用变阈技术的ECL4-2译码器改进设计,杭州大学学报(自然科学版),1996 23(4),388-389[6]吴训威,F Prosser,数字电路的开关级设计理论,中国科学(E辑),1996,26(3),257-265[7]吴训威著,多值逻辑电路设计原理,杭州,杭州大学出版社,1994,第十章.