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Volume 22 Issue 5
Sep.  2000
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Zhou Xuanchang, Wu Xunwei. DOUBLE-EDGE-TRIGGERED FLIP-FLOPS IN TERNARY DYL CIRCUITS[J]. Journal of Electronics & Information Technology, 2000, 22(5): 842-846.
Citation: Zhou Xuanchang, Wu Xunwei. DOUBLE-EDGE-TRIGGERED FLIP-FLOPS IN TERNARY DYL CIRCUITS[J]. Journal of Electronics & Information Technology, 2000, 22(5): 842-846.

DOUBLE-EDGE-TRIGGERED FLIP-FLOPS IN TERNARY DYL CIRCUITS

  • Received Date: 1998-12-25
  • Rev Recd Date: 1999-09-06
  • Publish Date: 2000-09-19
  • By analyzing the switching characteristic of the multiple- transistor and combining its features of emit-input, emit-output and high working speed, a ternary double-edge-triggered flip-flops is designed in the paper. Computer simulation shows that this design has correct logic function and high working speed. It can be used in designing ternary DYL circuits.
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  • Unger S H.Double-edge-triggered flip-flops[J].IEEE Trans.on Computers.1981,C-30(6):447-451[2]Lu S L,Ercegovac M.A novel CMOS implementation of double-edge-triggered flip-flops[J].IEEE J.of Solid-State Circuits.1990,25(4):1008-1010[3]Hossain R,Wronski L D,Albicki A.Low power-design using double edge triggered flip-flops[J].IEEE Trans.VLSI Systems.1994,2(2):261-265[4]Afghahi M,Yuan J.Double-edge-triggered D-flip-flop for high-speed CMOS circuits[J].IEEE J.of Solid-State Circuits.1991,26(8):1168-1170[5]刘莹,方振贤.I2L和TTL型双边沿D触发器.电子科学学刊,1997,19(3):416-419.[6]王守觉,孙翔义,王润梅.一种新的高速集成电路多元逻辑电路(DYL).电子学报,1978,6(2):43-51.[7]吴训威,杭国强.基于比较运算与多晶体管的开关电路.中国科学(E辑),1997,27(5):444-452.[8]王守觉,吴训威等.基于线性与或门的新型超高速数字电路.电子科学学刊,1995,17(4):337-343.[9]吴训威,蒋保纬.基于多晶体管的高速逻辑门.科学通报,1995,40(14):1339-1341.[10]Wang S (王守觉),Wu X (吴训威),Feng H (冯宏娟).The high speed ternary logic gates based on the multiple-transistors.IEEE Proc of ISMVL,Bloomington:1995,178-181.
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