Design for a digital chaotic spreading sequence generator

Rao Mini

Volume 24 Issue 5

May 2002

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Rao Mini. Design for a digital chaotic spreading sequence generator[J]. Journal of Electronics & Information Technology, 2002, 24(5): 702-706.

Citation:

Rao Mini. Design for a digital chaotic spreading sequence generator[J]. Journal of Electronics & Information Technology, 2002, 24(5): 702-706.

Rao Mini. Design for a digital chaotic spreading sequence generator[J]. Journal of Electronics & Information Technology, 2002, 24(5): 702-706.

Citation:

Rao Mini. Design for a digital chaotic spreading sequence generator[J]. Journal of Electronics & Information Technology, 2002, 24(5): 702-706.

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Design for a digital chaotic spreading sequence generator

Rao Mini

Received Date: 2000-08-04
Rev Recd Date: 2001-03-19
Publish Date: 2002-05-19

Abstract

Abstract

The design method is given for the digital piecewise linear mapping system based on FPGA chip. In this method, the perturbation of m-sequence is used to overcome the short period of chaotic sequence caused by the finite precision effect. The piecewise linear chaotic generator is realized by means of VHDL and the simulations are made. The balance, the correlation and the linear complexity are compared between digital chaotic sequence and analogue chaotic sequence. A road is explored to apply the piecewise linear mapping system to a practical spreading spectrum system.

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References

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