Advanced Search
Volume 22 Issue 1
Jan.  2000
Turn off MathJax
Article Contents
Ma Cong, Yang Xun, Liu Mingye. A METHODOLOGY OF TECHNOLOGY MAPPING FOR MULTI-TARGET IN VHDL HIGH LEVEL SYNTHESIS SYSTEM[J]. Journal of Electronics & Information Technology, 2000, 22(1): 1-5.
Citation: Ma Cong, Yang Xun, Liu Mingye. A METHODOLOGY OF TECHNOLOGY MAPPING FOR MULTI-TARGET IN VHDL HIGH LEVEL SYNTHESIS SYSTEM[J]. Journal of Electronics & Information Technology, 2000, 22(1): 1-5.

A METHODOLOGY OF TECHNOLOGY MAPPING FOR MULTI-TARGET IN VHDL HIGH LEVEL SYNTHESIS SYSTEM

  • Received Date: 1998-05-08
  • Rev Recd Date: 1999-02-28
  • Publish Date: 2000-01-19
  • This paper is focused on the research of connecting the HLS(High Level Synthesis) result to the technology of IC,To connect to deferent technology, a tactics of MLTMMT(Multi Level Technology Mapping for Multi-Target)is proposed, All key points are researched which include: (1)giying the formal descirption of the technology mapping for multi-target; (2)giving the method of MLTMMT; (3)analyzing and researching many technology libraries,presenting a lineal model of area and delay of the technology cells: (4)giving the set of the general RTL components; (5)building the VHDL simulation model in different technologies.The system has been connected To 3 kinds of IC prodaction line: and this verifies the theory and method.
  • loading
  • 刘明业,等.专用集成电路(ASIC)高级综合理论.北京:北京理工大学出版社,1998,179-246.[2]马聪,刘明业,等.VHDL高级综合与底层物理设计的衔接,电子学报,1998,26(2):71-73.[3]Chaadhuris,Quayle M.Using conmplex sequential models in RTL synthesis Proc.Ninth Annual IEEE International ASIC Conference and Exhibit Rochester,NY,USA:23-27,Sept.1996,139-142[4]Chaudhary K,Pedram M Computing the area versus delay trade-off curves in technology mapping IEEE Trans.On Conp.-Aided Des.Of Integr.Circuits Syst.1995,14(12):1480-1489.[5]Shih-Chien Chang,Marek-Sadowdka M. Technology mapping for TLU FPGAs based on decomposition of binary decision diagrams,IEEE Trans,on Comp.-Aided Des.Of Integr.Circuits Syst 1996,15(10):1226-1236.[6]Jha P K,Durt N D.High-level library mapping for arithmetic components,IEEE Trans.On VLSI Syst.1996,4(2):157-169。[7]马聪、刘明业,等.高级综合中工艺单元VHDL模拟模型的建立方法.计算机辅助设计与图形学学报,1998,10(增刊):143-147.
  • 加载中

Catalog

    通讯作者: 陈斌, bchen63@163.com
    • 1. 

      沈阳化工大学材料科学与工程学院 沈阳 110142

    1. 本站搜索
    2. 百度学术搜索
    3. 万方数据库搜索
    4. CNKI搜索

    Article Metrics

    Article views (1895) PDF downloads(509) Cited by()
    Proportional views
    Related

    /

    DownLoad:  Full-Size Img  PowerPoint
    Return
    Return