Du Shi-Min, Xia Yin-Shui, Chu Zhu-Fei, Huang Cheng, Yang Run-Ping. A Stable Fixed-outline Floorplanning Algorithm for Soft Module[J]. Journal of Electronics & Information Technology, 2014, 36(5): 1258-1265. doi: 10.3724/SP.J.1146.2013.01181
Citation:
Du Shi-Min, Xia Yin-Shui, Chu Zhu-Fei, Huang Cheng, Yang Run-Ping. A Stable Fixed-outline Floorplanning Algorithm for Soft Module[J]. Journal of Electronics & Information Technology, 2014, 36(5): 1258-1265. doi: 10.3724/SP.J.1146.2013.01181
Du Shi-Min, Xia Yin-Shui, Chu Zhu-Fei, Huang Cheng, Yang Run-Ping. A Stable Fixed-outline Floorplanning Algorithm for Soft Module[J]. Journal of Electronics & Information Technology, 2014, 36(5): 1258-1265. doi: 10.3724/SP.J.1146.2013.01181
Citation:
Du Shi-Min, Xia Yin-Shui, Chu Zhu-Fei, Huang Cheng, Yang Run-Ping. A Stable Fixed-outline Floorplanning Algorithm for Soft Module[J]. Journal of Electronics & Information Technology, 2014, 36(5): 1258-1265. doi: 10.3724/SP.J.1146.2013.01181
A stable Fixed-Outline Floorplanning (FOF) algorithm for soft module is proposed in this paper. It takes the Normalized Polish Expression (NPE) as a floorplan solution, using the shape curve adding algorithm and the interpolation technique to compute the best floorplan of a NPE. The Simulated Annealing (SA) algorithm is used to search the solution space. A post-floorplanning optimization method based on the new Insertion After Delete (IAD) operator is adopted to optimize those SA floorplan solutions which fail to meet the fixed-outline constraints. The experimental results on eight GSRC and MCNC benchmarks show that the proposed algorithm can not only achieve a nearly 100% floorplanning success rate under fixed-outline constraints with 1% white space but can also obtain better total wirelength than previous works. Besides, the proposed algortihtm has a greater advantage in the runtime over the similar SA-based algorithms.