A Novel Critical Delay-Aware Mapping Method for Real-Time Digital Signal Systems with NoC Platform

Hu Jing-cao and Marculescu R. Energy- and performance-aware mapping for regular NoC architectures[J].IEEETransactions on Computer-aided Design of IntegratedCircuits Systems.2005, 24(4):551-562[2]Hu Jing-cao and Marculescu R. Communication and taskscheduling of application-specific network-on-chip[J].IEEProcessing-Computer Digital Technology.2005, 152(5):643-651[3]Ascia G.[J].Catania V, and Palesi M. Multi-objective mappingfor mesh-based NoC architectures[C]. CODES+ISSS04,Stockholm, Sweden, ACM.2004,:-[4]Lei T and Kumar S. A two-step genetic algorithm formapping task graphs to a network on chip architecture[C].DSD03, Turkey, IEEE, 2003: 180-187.[5]Zhou Wen-biao, Zhang Yan, and Mao Zhi-gang. Anapplication specific NoC mapping for optimized delay[C].Design and Test of Integrated Systems in NanoscaleTechnology, Sept 5-7, DTIS, 2006: 184-188.[6]Modarressi M and Sarbazi-Azad H. Power-aware mapping forreconfigurable NoC architectures[C]. 25th InternationalConference on Computer Design, ICCD, Oct 7-10, 2007:417-422.[7]Nickray M.[J].Dehyadgari M, and Afzali-Kusha A. Power anddelay optimization for network on chip[C]. ECCTD05, Cork,Ireland, IEEE.2005,:-[8]Gu Hai-yun, Li Chang-wen, and Sun Shu. Research onmapping algorithm of irregular mesh NoC for portablemultimedia appliances[C]. IET Conference on Wireless,Mobile and Sensor Networks, 2007 (CCWMSN07), Dec 12-14.2007: 697-700.[9]Cong Liu and Baskiya S. Scheduling mixed tasks withdeadlines in grids using bin packing[C]. 14th IEEEInternational Conference on Parallel and Distributed Systems,2008(ICPADS '08). Dec. 8-10, 2008: 229-236.[10]Hu Jing-cao and Marculescu R. Energy-aware mapping fortilebased NoC architectures under performanceconstraints[C]. ASP-DAC 2003, Japan, ACM, 2003: 233-239.[11]Withironprasert K, Chusanapiputt S, Nualhong D, JantarangS, and Phoomvuthisarn S. Hybrid ant system/priority listmethod for unit commitment problem with operatingconstraints[C]. IEEE International Conference on IndustrialTechnology, 2009(ICIT 2009), Feb. 10-13, 2009: 1-6.[12]Ning Wen, Kumar N, Dechu S, and Soewito B. Mapping taskgraphs onto Network Processors using genetic algorithm[C].IEEE/ACS International Conference on Computer Systemsand Applications, 2008(AICCSA 2008), March 31-April 4,2008: 481-488.[13]丁庆. B3G TDD中关键技术信道估计技术的研究及其硬件实现. [硕士论文], 成都: 电子科技大学, 2004: 49-50.