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Volume 32 Issue 2
Aug.  2010
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Hu Yu-xiang, Lan Ju-long, Wu Jun-ting. The Switch Structure and Scheduling Algorithm for Maintaining Packet Order in Multistage Switching Fabric[J]. Journal of Electronics & Information Technology, 2010, 32(2): 272-277. doi: 10.3724/SP.J.1146.2009.00299
Citation: Hu Yu-xiang, Lan Ju-long, Wu Jun-ting. The Switch Structure and Scheduling Algorithm for Maintaining Packet Order in Multistage Switching Fabric[J]. Journal of Electronics & Information Technology, 2010, 32(2): 272-277. doi: 10.3724/SP.J.1146.2009.00299

The Switch Structure and Scheduling Algorithm for Maintaining Packet Order in Multistage Switching Fabric

doi: 10.3724/SP.J.1146.2009.00299
  • Received Date: 2009-03-09
  • Rev Recd Date: 2009-07-27
  • Publish Date: 2010-02-19
  • Current single-stage switch structure encounters its bottleneck in scalability. This paper proposes a novel central-stage buffered scalable multistage switch structure, and establishes its mathematical model by queuing theory. For the problem of cell disorder, this paper puts forward a new algorithm to maintaining packet order simply and effectively by controlling the point in input stage and central stage strictly. The results of academic analysis show that this structure could provide 100% throughput which costs less as well. The results of simulation show that this algorithm not only could provide perfect throughput performance, but also take on a better delay performance in heavy load.
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  • Oki E, Jing Zhi-gang, and Rojas-Cessa R, et al.. Concurrent round-robin-based dispatching schemes for clos-network switches[J].IEEE/ACM Transactions on Networking.2002, 10(6):830-844[2]Chiussi F M, Kneuer J G, and Kumar V P. Low-cost scalable switching solutions for broadband networking: The ATLANTA architecture and chipset[J]. IEEE Communications Magazine, 1997, 35(12): 44-53.[3]Chrysos N and Katevenisz M. Scheduling in non-blocking buffered three-stage switching fabrics[C]. Proc. IEEE Globecom2006, Francisco, IEEE Computer Society, 2006: 6-13.Wang Feng, Zhu Wen-qi, and Hamdi M. The central-stage buffered clos-network to emulate an OQ switch[C]. Proc. IEEE Globecom2006, Francisco, IEEE Computer Society, 2006: 1-5.[4]Li X and Elhanany I. A scalable frame-based multi-crosspoint packet switching architecture[C]. Proc. HPSR, Brooklyn, USA, 2007: 61-65.盛友招. 排队论及其在现代通信中的应用[M]. 北京: 人民邮电出版社, 2007: 50-55.[5]Shen Yanming, Panwar S S, and Chao H J. Providing 100% throughput in a buffered crossbar switch[C]. Proc. HPSR, Brooklyn, USA. 2007: 1-8.[6]Iyer S and Mckeown N. Making parallel switches practical[C]. Proc. INFOCOM2001, Alaska, IEEE Computer Society, 2001: 1680-1687.[7]杨君刚, 鲍民权, 刘增基等. 一种具有信元保序能力的Clos网络分布式调度算法[J]. 计算机学报, 2008, 31(3): 467-475.Yang Jun-gang, Bao Min-quan, and Liu Zeng-ji, et al.. A distributed scheduling algorithm maintaining cells order for three-stage clos networks[J].Chinese Journal of Computers.2008, 31(3):467-475[8]兰巨龙, 董雨果, 陈越, 温建华. 并行交换中支持包保序的缓存结构及调度算法[J]. 电子学报, 2004, 32(12): 35-38.Lan Ju-long, Dong Yu-guo, Chen Yue, and Wen Jian-hua. The buffer structure and scheduling algorithm for maintaining packet order in the parallel switch[J]. Acta Electronica Sinica, 2004, 32(12): 35-38.
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