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Volume 32 Issue 2
Aug.  2010
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Yin Shu-juan, Li Xiang-yu, Sun Yi-he. Design of 16 bit Low-Voltage Low-Power Modulator with Standard Digital Technology[J]. Journal of Electronics & Information Technology, 2010, 32(2): 464-469. doi: 10.3724/SP.J.1146.2009.00116
Citation: Yin Shu-juan, Li Xiang-yu, Sun Yi-he. Design of 16 bit Low-Voltage Low-Power Modulator with Standard Digital Technology[J]. Journal of Electronics & Information Technology, 2010, 32(2): 464-469. doi: 10.3724/SP.J.1146.2009.00116

Design of 16 bit Low-Voltage Low-Power Modulator with Standard Digital Technology

doi: 10.3724/SP.J.1146.2009.00116
  • Received Date: 2009-01-21
  • Rev Recd Date: 2009-05-14
  • Publish Date: 2010-02-19
  • For audio signals with input frequency between 20 Hz and 24 kHz, a switch-capacitor feed-forward A/D modulator in 0.18m Logic technology is proposed in this paper, which gains 16 bit resolution with 1.2 V supply voltage. The modulator can achieve 102.2 dB signal-to-noise ratio (SNR) under 6MHz sample clock, and the total power dissipation is only 2.46 mW. In the modulator, a pseudo-two-stage Class-AB transconductance amplifier is used, which has high slew rate and open loop gain while without increasing power dissipation. What is more, full compensated depletion-mode capacitors are used as sample capacitors and integrating capacitors to enable the whole chip to be fabricated in standard digital technology, which is good to reduce chip cost and improve the modulators compatibility in technology. Compared with other low-power low-voltage A/D modulators reported, this design has better FOM (Figure Of Merit).
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  • Yao Libin. Low-power low-voltage sigma-delta modulators in nanometer CMOS [D]. Catholic University Leuven, Belgium, 2006.[2]Jeongjin R. High-Gain Class-AB OTA with Low Quiescent[3]Current [J]. Analogous Circuit and Signal Processing, 2006, 47(2): 225-228.[4]David Baez-Villegas and Jose Silva-Martinez. Quasi rail-to- rail very low-voltage opamp with a single pMOS input differential pair [J].IEEE Transactions on Circuits and SystemsII: Express Briefs.2006, 53(11):1175-1179[5]Juan M, Carrillo, and Guido Torelli. 1-V rail-to-rail CMOS opamp with improved bulk-driven input stage [J].IEEE Journal of Solid-State Circuits.2007, 42(3):508-517[6]Yin Shujuan and Sun Yihe. Full compensated depletion-mode MOS-capacitor for pure digital technology low voltage switched-capacitor applications [C]. IEEE International Conference on Electron Devices and Solid-State Circuits. Taiwan, Dec. 2007: 913-916.[7]Goes J and Vaz B. A 0.9 V modulator with 80 dB SNDR and 83 dB DR using a single-phase technique [C]. IEEE ISSCC Dig. Tech. San Francisco, 2006: 74-75.[8]Roh J and Byun S. A 0.9 V 60 W 1 bit fourth-order delta-sigma modulator with 83-dB dynamic range [J]. IEEE Journal of Solid-state Circuits, 2008, 43(2): 225-228.
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